80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 30
![no-image](/images/no-image-200.jpg)
80ksbr200
Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
1.80KSBR200.pdf
(172 pages)
- Current page: 30 of 172
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„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
4.7.1 One Missing Packet Detected
address), a marker shall be loaded into the queue to indicate that a missing packet was detected. The incoming packet
shall also be loaded into the queue. Two packets shall be transmitted from the queue to attempt to regain the timed data
flow (observing transmission rate restrictions). No error is noted and no flag is set.
it at the time that is designated for the original packet had it not been missing. The DSP receiving the dummy will realize it
is a dummy, and can take appropriate action. It follows the normal waterlevel/watermark scheme for transmitting packets.
4.7.2 Two or More Missing Packets Detected
error flag shall be set, which may cause additional doorbells and interrupts. The SerB shall continue to load and transmit
data normally, hopefully recovering full operation after the system clears itself of defective data.
4.7.3 Missing Packet Detection Summary
If only one packet was lost and the packet that arrived is actually the following packet (detected by the memory
When the missing packet marker reaches the output of the queue, the SerB shall create a dummy packet and transmit
If the stop address is reached, a flag event has occurred and the appropriate flags will toggle.
In the event that two or more packets are missing, no attempt will be made to reconstruct lost packets. The missing 2
The summary for missing packets is as follows:
The memory address of each incoming packets shall be checked to insure contiguous addresses.
–
–
In the event that an address does not match, it is assumed that there is a missing packet. The memory
increment will again be added to the current address and checked with the address of the incoming packet.
–
–
If one packet is missing
–
–
–
–
–
If more than one packet is missing
–
–
–
–
–
–
–
At the boundary conditions where the memory address exceeds the stop address
–
–
–
–
–
The memory increment added to the former memory address tells you what the new address should be.
The memory increment does not change in a system, but will be different between systems. Therefore,
packets are known length.
If the addresses match, only one packet is missing
If the addresses do not match, two or more packets are missing, or a serious address misalignment has
occurred.
A missing packet marker is loaded into the queue
The incoming packet shall be loaded into the queue
Two packets will automatically be transmitted based on the watermark
The packet interval timer will limit the transmission rate to match the PPS acceptance rate.
When the missing packet location reaches the queue output, a dummy packet (a packet with all zeros in
the payload) shall be transmitted to replace the missing packet
No changes will be made to waterlevels
No lost packet markers shall be loaded.
No dummy packets shall be sent
The “Missing 2 Packet” flag shall be set in the Missing 2 programmable flag register.
If the flag is unmasked, a doorbell shall be sent to the destination ID within the register. The content of the
doorbell shall be the content designated in the Missing 2 programmable flag register.
The Memory Address of the incoming packet will be loaded into the Current Memory Address register to
attempt to realign addresses
Processing will continue as normal on subsequent packets, allowing the DSP to decide if action is needed
On wrap, if the memory increment plus the former memory address exceeds the stop address, the new
address will be set to the memory start address. No packet is wrapped in the middle, but the next new
packet is set to the memory start address on a wrap.
If the next packet address does not start at the memory start address, a packet is considered missing and
should be replaced.
If a second packet fails to match the designated address (start address + increment), the packet will be
handled as described above -- "If more than one packet is missing"
The Start and Stop range values must be aligned to the increment boundary (a multiple of the increment).
There must be enough space in the queue to hold more than one packet for the “missing packet detection”
to function.
30 of 172
Advanced Datasheet*
March 19, 2007
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