80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 26

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
4.2.1 Burst Write Start/Stop Address
stream RIO system memory address as either an SWRITE or NWRITE type packets. To start the data burst, the starting
sRIO memory address should be loaded into the
Stop Address Register
Next Address Register
transmitted with every packet until reaching Stop Address. If a doorbell or interrupt is desired, that may also be
programmed.
in the configuration register. Therefore any data sent to this case, will increment the counters and addresses checked. It is
assumed that the user will be responsible for maintaining data integrity, and will probably use the case for one source of
data only.
data. The memory addresses will continue to increment with subsequent data until all data is transmitted and the port is
reconfigured or the address is reset to a new location.
Stop/Wrap on Memory Write
into the configuration register, the SerB will do the following:
4.3 Use of Acknowledgements
ification. Both the ability to enable ACK/NACK and the time-out associated with packet failure may be set by programming
the device configuration registers. The receipt of a NACK or the failure to receive an ACK within the allocated time will
trigger the retransmission of all packets sent after receipt of the last ACK.
acknowledged, or acknowledgements are received out of order, it is necessary to retransmit all packets starting after the
last packet for which a valid ACK was received.
edgments may be received in any order.
only be used when "retry-on-error" is enabled.
The SerB has the ability to pass large quantities of data with minimal overhead. Data can be passed from sRIO to down
The configuration is "case scenario" based. The start, stop counter, and wrap/stop bits are all configured with the “case”
The SerB will form sRIO packets, append the incrementing memory address and send the data out as an sRIO memory
Once sufficient data has entered the SerB to cause the sRIO memory address to reach the stop address programmed
sRIO has requirements for acknowledgements that must be observed by the SerB and are described in the sRIO spec-
When configured to require packet acknowledgements, the following rules apply:
Note that link level transmissions require that packet acknowledgements be received in the order sent. If a packet is not
sRIO link acknowledgements require acknowledgments in the order packets were transmitted, but end-to-end acknowl-
ACK and NACK are performed through link management packets and are not priority packets. ACK and NACK may
–
–
The SerB set the "Mem Stop" bit in the flag register. Unmasked doorbells and interrupts will be sent.
The case scenario will be checked for the WRAP/STOP bit setting.
Packet is sent with an identifier in the header
Additional packets may be sent before acknowledgement is received
Packet identifier is incremented for each packet (and wraps)
Good packets must be concluded with the End of Good Packet (EGP) marker
If a known bad packet is sent, it should be marked End of Bad Packet (EBP) marker.
Once a full packet is received, the receiving device must send an acknowledgement or a rejection notice.
If sender times out without an acknowledgement, the packet and all subsequent packets are sent again.
If rejection notice is received, packet must be retransmitted and all subsequent packets are retransmitted.
Packet is rejected if link errors, CRC errors, or EBP code is received
If the FIFO fills due to the inability to successfully transmit, it indicates a link down and appropriate flags and
priority packets sent (if possible).
If stop, the remainder of the packet will be transmitted. Stop condition must be cleared before any more
data can be transmitted.
If wrap, the address will reset to the start address after the overflow packet is fully transmitted. There will
be no attempt to perform the wrap in the middle of a packet. It is the user's responsibility to insure that
wrap boundaries concur with packet boundaries.
and an indication of whether to wrap or stop when hitting the maximum address.
initially starts off with same value as the Start Address and increments by the quantity of data
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Case Scenario Start Address Register
, along with the
Advanced Datasheet*
March 19, 2007
Case Scenario
Case Scenario