80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 18

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80ksbr200

Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
3.3.3 sRIO Mode Initialization
include SILENT, SEEK, and then DISCOVERY. Once DISCOVERY is complete, the mode will be set to 4X_MODE
(optimum performance), 1X_MODE_LANE0, or 1X_MODE_LANE2, depending upon the success of establishing the link.
The state machine for the MODE is shown on page VI-64 of the LP-Serial Specification for RapidIO.
3.3.4 sRIO Control Symbols
otherwise idle. The control symbols are described in
delimiters /K28.3/ if a packet delimiter is included or /K28.0/ if there is no packet delimiter.
3.3.5 sRIO End-to-End Retransmissions
the sRIO compliance testing as an endpoint. When S-Port is acting as an sRIO slave, the SerB fully acknowledges all link-
to-link transactions and end-to-end transactions per the sRIO specification.
the link level, the SerB has the ability to receive acknowledgement of all transactions at the link level and perform retrans-
missions of any packets for which a retransmission has been requested.
from the SerB as a bus master, an end-to-end response packet should be received in due time. The packet will be handled
as follows:
3.3.6 The SerB as an sRIO System Host
occasion and will take control of the bus to accomplish the transmission of selected data items or perform selected func-
tions. The SerB does not have the ability to control a system or fully interact and interpret the actions of other devices in
the system. Bus mastering is limited to the transmission of the designated data.
3.4 The sRIO Packet
complete description of sRIO packets and their architecture. Packet aspects that are significant in the SerB are described
here for clarity, but the sRIO specification overrides in the event of a discrepancy.
Once sync and alignment is accomplished, the sRIO controlling device will search for the SerB. The steps of the search
sRIO requires the transmission of control symbols providing link status every 819.2ns or less whenever the link is
As an sRIO bus endpoint, the SerB supports end-to-end sRIO retransmissions. This is required for the SerB to meet
As an sRIO bus master, as would be the case with a waterlevel or doorbell master, the SerB has limited capabilities. At
The SerB does not have the ability to support end-to-end retransmissions as a bus master. When a packet is sent out
The SerB has no ability to act as a host in an sRIO system. The SerB does have the ability to act as a bus master on
sRIO has a defined packet structure for each type of packet. The sRIO specification should be referenced for a
Looking at
If the response is an acknowledgement -- the response will be ignored.
If the response is a retransmission request - a flag will be set and the packet otherwise ignored. No
retransmission will be attempted.
If there is no response - the SerB will not realize there was no response, because it was not looking for one.
Physical Layer Defined header, shown in
The transaction type, TT, that defines 8 or 16 bit device ID fields, shown in
Figure
3, the sRIO packet contains the following items:
18 of 172
Figure 3 Generic sRIO Request Packet
section 5.2
Figure
4.
of the LP-Serial Specification for RapidIO. These include
Figure 5.
Advanced Datasheet*
March 19, 2007

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