80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 169
80ksbr200
Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
1.80KSBR200.pdf
(172 pages)
- Current page: 169 of 172
- Download datasheet (2Mb)
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
17.0 Package Specifications
17.1 Package Physical & Thermal Specifications
Package: Super FlipChip FCBGA(BR484)
Dimensions: 23 x 23mm
Ball Count: 484
Ball Diameter: 0.6mm
Ball Pitch: 1.0mm
Theta J
Theta J
IDT 80KSBR200
U19
AB17
M18
M19
T18
T19
A
C
= {11.9C/W @ 0m/s, 8 C/W @ 1m/s, 7.3 C/W @ 2m/s}
= 0.2 C/W
WRO_N
ZQ
DNC
DNC
DNC
DNC
Write Strobe
P-Port
Impedance
(VDD, GND) / CMOS Output
169 of 172
When QDR type SRAM attached, this output should be con-
nected to the /Wr input on the QDR SRAM(s). The FIFO control-
ler will use this pin to control the write function on the SRAM.
Do Not Connect
Do Not Connect
Do Not Connect
Do Not Connect
Advanced Datasheet*
March 19, 2007
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