80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 16

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80ksbr200

Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
ation.
3.2.1 RapidIO Spec. Version 1.3
device, or connect to any other sRIO compliant 1x/4x port. This includes the standard lane fail functions where a failure of
any lane on a 4x port will force the device into a 1x operation on lane 0 or lane 2. The SerB has no requirement to perform
with more than a single 1x port. Restated, S-Port shall be either a 4x port or a 1x port as designated by the configuration or
fail mode, but shall never be four 1x ports operating simultaneously.
specification will be listed individually below along with the compliance level for the SerB. Some of the documents are not
complete and published. Some are working group showings.
There is a checklist for compliance to version 1.3 of the RIO specification, which will be used to insure proper RIO oper-
In compliance with the sRIO specification, the port has the ability to connect directly to a 1x/4x sRIO port on the PPS
The RIO specification is a universal specification and all sections do not fully apply to the SerB. Each of the parts of the
Each chapter is discussed in a separate section below.
Part 1: Input/Output Logical Specification
The SerB device shall abide by this spec.
Part 2: Message Passing Logical Specification
The SerB device shall abide by this spec.
Part 3: Common Transport Specification
The SerB device shall abide by this spec.
Part 4: Physical Layer 8/16 LP-LVDS Specification
The SerB device does not support this spec.
Part 5: Globally Shared Memory Logical Specification
The SerB device does not support this spec.
Part 6: Physical Layer 1x/4x LP-Serial Specification
The SerB shall abide by this spec.
Part 7: System and Device Inter-operability Specification
The SerB device shall comply with the Generic Class Requirements (class 1+).
Part 8: Error Management Extensions Specification
The SerB device shall comply with this spec.
Part 9: Flow Control Logical Layer Specification
The SerB devices does not support this spec.
Part 10: Data Streaming Logical Specification
The PPS device does not support this spec.
Part 11: Multicast Extensions Specification
SerB device shall abide by this spec (do nothing). A multicast for SerB is a simple write to an address.
gsmlspec.pdf
serial_book.pdf
inter-op.pdf
errspec.pdf
fcspec.pdf
encapspec.pdf
mcspec.pdf
sbtg.pdf
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Part 5: Globally Shared Memory Specification
Part 6: 1x/4x LP-Serial Physical Layer Specification
Part 7: System and Device Inter-operability Spec
Part 8: Error Management Extensions Specification
Part 9: Flow Control Logical layer Specification
Part 10: Data Streaming logical Specification
Part 11: Multicast Extensions Specification
Annex 1: Software/System Bring Up Specification
Advanced Datasheet*
March 19, 2007

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