80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 42
![no-image](/images/no-image-200.jpg)
80ksbr200
Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
1.80KSBR200.pdf
(172 pages)
- Current page: 42 of 172
- Download datasheet (2Mb)
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
predetermined system host (defined in the Port-write Target deviceID CSR). SerB sets the Port-write Pending status bit in
the Port 0 Error and Status CSR. A 16 byte data payload of the Maintenance Port-write packet contains the contents of
several CSR, as shown in table below. Once System Software receives an Port-write operation, it indicates that it has seen
the port-write by clearing the Port-write Pending status bit in the Port 0 Error and Status CSR.
identify the reporting device within the system. A Port ID field contains all 0’s indicating port 0, the Logical/Transport Layer
Error Detect CSR, and the Port 0 Error Detect CSR are used to describe the encountered error condition.
7.3 sRIO Errors Supported
7.3.1 Physical Layer Errors
Enable column lists the control bits that may disable the error checking associated with a particular error (if blank, error
checking cannot be disabled). The Cause Field column indicates what cause field will be used with the associated packet-
not-accept control symbol for Input Error Recovery. The EME Error Enable/Detect column indicates which bit of the
P0ERECSR allows the error to increment the Error Rate Counter and lock the Port 0 Error Capture registers, and likewise
which bit of the P0EDCSR is set when the error has been detected.
Threshold, Failed Threshold, Retry Threshold).
Physical RIO Errors Detected
symbol do not make sense (not
with an /S/ or /PD/ control char-
Control symbol does not begin
Received character had a dis-
Received an invalid character,
The Component Tag CSR is defined in the RapidIO Part 3: Common Transport Specification, and is used to uniquely
Table below lists all the RIO link errors detected by the SerB physical layer and the actions taken by SerB. The Error
Table 4
The four contol character bits
associated with the received
or valid but illegal character
0000, 1000, 1111).
Byte Offset
below, Physical RIO Threshold Response, lists SerB behavior after exceeding certain preset limits (Degraded
parity error.
Payload
Data
Error
acter.
0xC
0x0
0x4
0x8
Table 2 Port-write Packet Data Payload for Error Reporting
Error Enable
42 of 172
Table 3 Physical RIO Errors Detected
Implementation Specific
Logical/Transport Layer Error Detect CSR
Enter Output Error
Enter Output Error
Enter Output Error
Enter Output Error
Enter Input Error
Enter Input Error
Enter Input Error
Enter Input Error
SerB action
Stopped.
Stopped.
Stopped.
Stopped.
Stopped.
Stopped.
Stopped.
Stopped.
Port 0 Error Detect CSR
Component TAG CSR
Word
Cause Field
invalid/illegal
invalid/illegal
invalid/illegal
invalid/illegal
5: Received
5: Received
5: Received
5: Received
character
character
character
character
EME Error
Delineation
Advanced Datasheet*
Type
Error
PortID(byte)
March 19, 2007
EME Error
Enable /
Detect
DE
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