80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 159

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
M22
M21
L21
L22
K21
K22
J21
J22
L18
L19
H21
H22
G21
G22
K18
K19
H19
J19
J18
G19
AA17
AB18
Q16
Q17
Q18
Q19
Q20
Q21
Q22
Q23
Q24
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
Q33
Q34
Q35
QDRA
QDRB
QDR SRAM
Data Out 16
QDR SRAM
Data Out 17
QDR SRAM
Data Out 18
QDR SRAM
Data Out 19
QDR SRAM-
Data Out 20
QDR SRAM
Data Out 21
QDR SRAM
Data Out 22
QDR SRAM
Data Out 23
QDRSRAM
Data Out 24
QDR SRAM
Data Out 25
QDR SRAM
Data Out 26
QDR SRAM
Data Out 27
QDR SRAM
Data Out 28
QDR SRAM
Data Out 29
QDR SRAM
Data Out 30
QDR SRAM
Data Out 31
QDR SRAM
Data Out 32
QDR SRAM
Data Out 33
QDR SRAM
Data Out 34
QDR SRAM
Data Out 35
QDR Mem Size
QDR Mem Size
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDDQ, GND) / CMOS Output
(VDD, GND) / CMOS Input
(VDD, GND) / CMOS Input
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The QDR Output Data Bus 16
The QDR Output Data Bus 17
The QDR Output Data Bus 18
The QDR Output Data Bus 19
The QDR Output Data Bus 20
The QDR Output Data Bus 21
The QDR Output Data Bus 22
The QDR Output Data Bus 23
The QDR Output Data Bus 24
The QDR Output Data Bus 25
The QDR Output Data Bus 26
The QDR Output Data Bus 27
The QDR Output Data Bus 28
The QDR Output Data Bus 29
The QDR Output Data Bus 30
The QDR Output Data Bus 31
The QDR Output Data Bus 32
The QDR Output Data Bus 33
The QDR Output Data Bus 34
The QDR Output Data Bus 35
Reserved and should be tied to Ground.
Specifies what size QDR SRAM is connected externally.
0 = 16 address lines are active (36M QDR2 B4 SRAM)
1 = 17 address lines are active (72M QDR2 B4 SRAM)
Advanced Datasheet*
March 19, 2007