80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 130
80ksbr200
Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
1.80KSBR200.pdf
(172 pages)
- Current page: 130 of 172
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„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
13.6.1 Receiver Eye Diagrams
Error Rate specification (Receiver AC Timing Specification - 1.25 GBaud, Receiver AC Timing Specification - 2.5 GBaud,
and Receiver AC Timing Specification - 3.125 GBaud) when the eye pattern of the receiver test signal (exclusive of sinuso-
idal jitter) falls entirely within the un-shaded portion of the Receiver Input Compliance Mask shown in
parameters specified in
device with the device replaced with a 100 Ohm +/- 5% differential resistive load.
For each baud rate at which an LP-Serial receiver is specified to operate, the receiver meets the corresponding Bit
Figure 38 Receiver Input Compliance Mask Parameters exclusive of Sinusoidal Jitter
Figure
37. The eye pattern of the receiver test signal is measured at the input pins of the receiving
Figure 37 Receiver Input Compliance Mask
130 of 172
Advanced Datasheet*
March 19, 2007
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