SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 123

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

DATA SHEET
Table 3–4: SFR register description, continued
Micronas
Name
IP0
G5P1
G4P1
G3P1
G2P1
G1P1
G0P1
CISR0
L24
ADC
WTmr
Sub
hB8
hB8[5]
hB8[4]
hB8[3]
hB8[2]
hB8[1]
hB8[0]
hC0
hC0[7]
hC0[6]
hC0[5]
Dir
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
h00
0
0
0
0
0
0
h00
0
0
0
Sept. 10, 2004; 6251-556-3DS
Range
0..1
0..1
0..1
0..1
0..1
0..1
0..1
0..1
0..1
Function
Interrupt Priority 0
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Interrupt Group Priority Level as follows:
0 0: Interrupt Group x is set to priority level 0 (lowest).
0 1: Interrupt Group x is set to priority level 1.
1 0: Interrupt Group x is set to priority level 2.
1 1: Interrupt Group x is set to priority level 3 (highest).
Central Interrupt Service 0
1: Line 24 start interrupt occurred, source bit set by hardware,
Source bit must be reset by software after servicing the interrupt.
0: Interrupt has not occurred.
1: Analog to digital conversion complete source bit set by hardware.
Source bit must be reset by software after servicing the interrupt.
0: Interrupt has not occurred.
1: Watchdog in timer mode overflow source bit set by hardware.
Source bit must be reset by software after servicing the interrupt.
0: Interrupt has not occurred.
On reset this bit is initialized to 0, however if timer mode is selected
and timer is running, every over flow of timer will set this bit. Therefore
software must clear this bit before enabling the corresponding
interrupt.
SDA 55xx
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