SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 157

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

DATA SHEET
4.8. Pin Descriptions
Pin numbers refer to the PMQFP100-1 package.
Pin 1, 2, 3, 4, D0, D1, D2, D3 − Data bus for external
memory or data RAM.
Pin 5, XROM − This pin must be pulled low to access
external ROM.
Pin 6, 73, VDD 2.5 − Supply voltage (2.5 V).
Pin 7, 39, 74, 91, VSS − Ground (0 V).
Pin 8, 40, 75, 92, VDD 3.3 − Input/Output (3.3 V).
Pin 9, 10, 11, 12, 13, 14, 15, 16, P0.0, P0.1, P0.2,
P0.3, P0.4, P0.5, P0.6, P0.7 − Port 0 is a 8-bit open
drain bidirectional I/O-port. Port 0 pins that have “1”
written to them float; in this state they can be used as
high impedance inputs (e.g. for software driven I²C Bus
support).
Pin 17, ENE − Enable Emulation. Only if this pin is set
to zero externally, STOP and OCF are operational.
ENE has an internal pull-up resistor which switches
automatically to non-emulation mode if ENE is not
connected.
Pin 18, STOP − Stop. Emulation control line. Driving a
low level during the input phase freezes the real time
relevant internal peripherals such as timers and inter-
upt controller.
Pin 19, OCF − Opcode Fetch. Emulation control line. A
high level driven by the controller during output phase
indicates the beginning of a new instruction.
Pin 20, EXTIF − This pin must be pulled low to enable
extended memory interface.
Pin 21, CVBS − CVBS input for the acquisition circuit.
Pin 22, 56, VDDA 2.5 − Supply voltage for analog com-
ponents.
Pin 23, 55, VSSA − Ground for analog components.
Pin 24, , 25, 26, 27, P2.0, P2.1, P2.2, P2.3 − Port 2 is a
4-bit input port without puul-up resistors. Port 2 also
works as analog input for the 4-channel-ADC. See
Section on page 155.
Pin 28, NC − Pin not connected.
Pin 29, HS/SSC − In slave mode horizontal sync input
or sandcastle input for display synchronisation. In mas-
ter mode HS or VCS output.
Micronas
Sept. 10, 2004; 6251-556-3DS
Pin 30, VS/P4.7 − Vertical sync input/output for diaplay
synchronisation. Can also be used as digital input P4.7
Furthermore this pin can be selected as an ODD/
EVEN indicator alternatively to P3.0. See Section on
page 155.
Pin 31, 32, 33, 34, 35, 36, 37 ,38, P3.0, P3.1, P3.2,
P3.3, P3.4, P3.5, P3.6, P3.7 − Port 3 is an 8-bit bidi-
rectional I/O-port with internal pull-up resistors. Port 3
pins that have “1” written to them are pulled high by the
internal pull-up resistors and in that state can be used
as inputs. To use the secondary functions of Port 3, the
corresponding output latch must be programmed to a
“1” for that function to operate.
The secondary functions are as follows:
P3.0: ODD/EVEN indicates output.
P3.1: External extra interrupt 0 (INTX0)/UART(TXD)
P3.2: Interrupt 0 input/timer 0 gate control input (INT0)
P3.3: Interrupt 1 input/timer 1 gate control input (INT1)
P3.4: Counter 0 input (T0)
P3.5: Counter 1 input (T1) or in master mode HS or
VCS output
P3.7: External extra interrupt 1 (INTX1)/UART(RXD)
Note: P3.6 mustnot be kept to “0” during reset, other-
wise a testmode will be activated.
See Section on page 155.
Pin 41, 42, 43, 44, 45, 46, 47, 62, P1.0, P1.1, P1.2,
P1.3, P1.4, P1.5, P1.6, P1.7 − Port 1 is a 8-bit bidirec-
tional multifunction I/O-port with internal pull-up resis-
tors. Port 1 pins that have “1” written to them are pulled
high by the internal pull-up resistors and in that state
can be used as inputs.
The secondary functions of Port 1 pins are:
Port bits P1.0 - P1.5 contain the 6 output channels of
the 8-bit pulse width modulation unit.
Port bits P1.6 - P1.7 contain the two output channels
of the 14-bit pulse width modulation unit.
See Section on page 155.
Pin 48, 49, P4.2, P4.3 − Port 4 is a bidirectional I/0-port
with internal pull-up resistors. Port 4 pins that have an
“1” written to them are pulled high by the internal pull-
up resistors and in that state can be used as inputs.
The secondary functions are:
P4.2: RD, Read line. This signal is the same as the
outcoming signal of pin RD available in some pack-
ages.
P4.3: WR, write line. Thissignal is the same as the out-
coming signal of pin WR, which is only available in
some packages.
See Section on page 155.
Pin 50, RST − A low level on this pin resets the device.
An internal pull-up resistor permits power-on reset
using only one extrnal capacitor connected to VSS.
Pin 51, NC − Pin is not conected.
Pin 52, XTAL2 − Output of the inverting oscillator
amplifier.
SDA 55xx
157