SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 39

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

DATA SHEET
2.3.6. Interrupt Priority
For the purposes of assigning priority, the 24 possible
interrupt sources are divided into groups determined
by their bit position in the Interrupt Enable Registers.
Their respective requests are scanned in the order as
shown in Table 2–19.
Each interrupt group may individually be assigned to
one of four priority levels by writing to the IP0 and IP1
Interrupt Priority registers at the corresponding bit
position.
An interrupt service routine may only be interrupted by
an interrupt of higher priority level. If two interrupts of
Table 2–19: Interrupt priority
2.3.6.1. Interrupt Priority Registers (IP0 IP1)
Table 2–20: Related registers
Micronas
Interrupt Group
0
1
2
3
4
5
1)
Register Name
IP0
bit addressable
IP1
See Section 3. on page 110 for detailed register description.
Not implemented
7
External
Interrupt 0
Timer 0
External
Interrupt 1
Timer 1
UART
A to D
6
Interrupts in Group High Priority
Display
External
Interrupt 6
ExternalX
Interrupt 0
WT Timer
ExternalX
Interrupt 1
Acquisition
V-Sync
V-Sync
5
G5P0
G5P1
Sept. 10, 2004; 6251-556-3DS
1)
4
G4P0
G4P1
External
Interrupt 12
External
Interrupt 13
PW Timer
Channel
Change
Acquisition
H-Sync
Display
H-Sync
different priority occur at the same time, the higher
level interrupt will be serviced first. An interrupt cannot
be interrupted by another interrupt of the same or a
lower priority level.
If two interrupts of the same priority level occur simul-
taneously, the order in which the interrupts are ser-
viced is determined by the scan order shown below.
Bit Name
3
G3P0
G3P1
1)
1)
External
Interrupt 18
External
Interrupt 19
External
Interrupt 20
External
Interrupt 21
Line 24
Start
A to D
Wake up
2
G2P0
G2P1
1)
1)
1)
1)
1
G1P0
G1P1
Group Priority
High
Priority
SDA 55xx
0
G0P0
G0P1
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