SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 128

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
Table 3–4: SFR register description, continued
128
Name
PWM_EN
PE[7:0]
CADC0
CADC0[7:0]
CADC1
CADC1[7:0]
CADC2
CADC2[7:0]
CADC3
CADC3[7:0]
CADCCO
ADWULE
AD[3:0]
Sub
hCE
hCE[7:0]
hD1
hD1[7:0]
hD2
hD2[7:0]
hD3
hD3[7:0]
hD4
hD4[7:0]
hD5
hD5[4]
hD5[3:0]
Dir
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
h00
0
h00
0
h00
0
h00
0
h00
0
h00
0
0
Sept. 10, 2004; 6251-556-3DS
Range
0..255
0..255
0..255
0..255
0..255
0..1
0..15
ADC
Function
PWM Channel Enable
PWM channel enable
0: The corresponding PWM-channel is disabled. P1.i functions as
normal bidirectional I/O-port.
1: The corresponding PWM-channel is enabled. PE0 Ö PE5 are
channels with 8-bit resolution, while PE6 and PE7 are channels with
14-bit resolution.
ADC Channel 0 Result
ADC result of channel 0
After finishing the A to D conversion the processor is informed by
means of an interrupt. The interrupt service routine can now take the
conversion result of channel 1 from CADC0. The result will be
available for about 46 ms after the interrupt.
ADC Channel 1 Result
ADC result of channel 1
After finishing the A to D conversion the processor is informed by
means of an interrupt. The interrupt service routine can now take the
conversion result of channel 2 from CADC1. The result will be
available for about 46 ms after the interrupt.
ADC Channel 2 Result
ADC result of channel 2
After finishing the A to D conversion the processor is informed by
means of an interrupt. The interrupt service routine can now take the
conversion result of channel 3 from CADC2. The result will be
available for about 46 ms after the interrupt.
ADC Channel 3 Result
ADC result of channel 3
After finishing the A to D conversion the processor is informed by
means of an interrupt. The interrupt service routine can now take the
conversion result of channel 4 from CADC3. The result will be stable
for about 46 ms after the interrupt.
ADC Configuration
Defines threshold level for wake up.
A special wake up unit has been included to allow a system wake up
as soon as the analog input signal on pin P2.0 drops below a
predefined level.
ADWULE defines the threshold level.
ADWULE = 0: Threshold level corresponds to fullscale - 4 LSB. This
means that if the digital input value drops below 255 - 4 = 251 an
interrupt will be triggered.
In voltages that is 2.5 V - 0.039 V = 2.461 V.
ADWULE = 1: threshold level corresponds to fullscale - 16 LSB. This
means that if the digital input value drops below 255 - 16 = 239 an
interrupt will be triggered.
In voltages that is 2.5 V - 0.156 V = 2.344 V.
Defines whether the corresponding port-pin is used as analog input or
as digital input.
0: Port pin is digital input (the analog value has less precision).
1: Port pin is analog input (the digital value is always 0).
DATA SHEET
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