SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 8

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SDA5523

Manufacturer Part Number
SDA5523
Description
SDA55xx TVText Pro
Manufacturer
Micronas Semiconductor
Datasheet
SDA 55xx
TVText Pro
Release Note: Revision bars indicate significant
changes to the previous edition.
1. Introduction
The Micronas SDA 55xx TV microcontroller is dedi-
cated to 8 bit applications for TV control and provides
dedicated graphic features designed for modern low
class to mid range TV sets.
The SDA 55xx is a microcontroller and single chip tele-
text decoder for decoding World System Teletext data
as well as other data services as Video Programming
System (VPS), Program Delivery Control (PDC), and
Wide Screen Signalling (WSS) data used for PAL plus
transmissions (in line 23). The data slicer and display
part of the SDA 55xx supports a wide range of TV
standards including PAL, NTSC as well as the acquisi-
tion of the above mention data services as VPS, WSS,
PDC, TTX and Closed Caption data.
The slicer combined with its dedicated hardware
stores TTX data in a VBI buffer of 1 kByte. The Micro-
controller firmware available from Micronas performs
all the acquisition tasks (hamming and parity checks,
page search and evaluation of header control bits)
once per field. Additionally, the firmware can provide
high end teletext features like Packet-26-handling,
FLOF, TOP and list page mode. The Application Pro-
gram Interface (API) to the user software is optimized
for a minimum SW overhead.
The on-chip display unit used to display teletext data
up to level 1.5 can also be used for customer defined
on-screen displays (OSD). The display generator is
able to handle parallel display attributes, pixel oriented
displays and dynamically re-definable characters
(DRCS).
The SDA 55xx provides also an integrated general-
purpose, fully 8051-compatible microcontroller with
specific hardware features especially suitable in TV
sets. The microcontroller core has been enhanced to
provide powerful features such as memory banking,
data pointers and additional interrupts, etc.
The internal XRAM consists of up to 16 kBytes. The
microcontroller provides an internal ROM of up to
128 kBytes. ROMless versions can access up to
1 MByte of external RAM and ROM.
The 8-bit microcontroller runs at 33.33 MHz internal
clock. SDA 55xx is realized in 0.25 micron technology
with 2.5 V supply voltage for the core and 3.3 V for the
I/O port pins to make them TTL compatible.
Based on the SDA 55xx microcontroller the MINTS
software package was developed and provides dedi-
cated device drivers for many Micronas video & audio
8
Sept. 10, 2004; 6251-556-3DS
products and includes a full blown TV control SW for
the PEPER application chassis. The SDA 55xx is also
supported with powerful design tools like emulators
from Hitex, Kleinhenz, iSystems, the Keil C51 Com-
piler and TEDIpro OSD development SW by Tara Sys-
tems. This support provided by Micronas leads to:
– Shorter time to market
– Re-usability of the SW also for future Micronas
– Target independent SW development based on
– Verification and validation of SW before targeting
– Graphical interface design requiring a minimum
– Complete, modular and open tool chain available
1.1. General Features
– 8051 compatible microcontroller with TV related
– Feature selection via special function register
– Simultaneous processing of TTX, VPS, PDC and
– Supply voltage 2.5 V for core and 3.3 V for ports
– ROM version package PSDIP52-2, PMQFP64-1
– Romless version package PMQFP100-2
– 128 kByte Flash ROM version package PSDIP52-2
1.1.1. External Crystal and Programmable Clock
– Normal mode 33.33 MHz CPU clock, power save
– CPU clock speed selectable via special function
– Single external 6 MHz crystal, all necessary clock
1.1.2. Microcontroller Features
– 8-bit 8051 instruction set compatible CPU
– Two 16-bit timers
– Watchdog timer
– Capture compare timer for infrared remote control
– Pulse width modulation unit (2 channels 14 bit,
products
ANSI C.
and improved SW test concept
effort for OSD programming and TV controlled know
how.
and configurable by customer.
special features and advanced OSD display
WSS (line 23) data
mode 8.33 MHz
registers.
signals are generated internally by means of PLLs
decoding
6 channels 8 bit)
Speed
DATA SHEET
Micronas

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