SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 43

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SDA5523

Manufacturer Part Number
SDA5523
Description
SDA55xx TVText Pro
Manufacturer
Micronas Semiconductor
Datasheet
DATA SHEET
2.3.15. Extension of Standard 8051 Interrupt Logic
For more flexibility, SDA 55xx family provides a new
feature for the status detection of external extra inter-
rupts EX0 and EX1 in an edge-triggered mode. Now
there is the possibility to trigger an interrupt on the fall-
ing and/or rising edge at the dedicated Port 3 Pin. In
order to use this feature respective IT0 and IT1 bits in
the TCON register must be set to activate edge trigger-
ing
Interrupt0, however description is also true for
interrupt1.
Table 2–24: Related register
Note: If both EXXxR and EXXxF are set then both ris-
Micronas
Register Name
IRCON
See Section 3. on page 110 for detailed register description.
mode.
ing and falling edges would generate an inter-
rupt. Minimum delay between the interrupts
should be ensured by the software.
If both the EXXxR and EXXxF are reset to 0,
interrupt is disabled.
External extra interrupts EX1 and EX2 are edge
triggered interrupts only.
Table 2–23
7
EXX1R
shows
6
EXX1F
combination
5
EXX0R
Sept. 10, 2004; 6251-556-3DS
for
4
EXX0F
Table 2–23: Interrupt combinations
IT0
0
0
0
0
1
1
1
1
Bit Name
3
EX1R
EX0R
0
0
1
1
0
0
1
1
EX0F
0
1
0
1
0
1
0
1
2
EX1F
Interrupt
Disabled
Low level
High level
Disabled
Disabled
Negative edge triggered
Positive edge triggered
Positive and negative edge
triggered
1
EX0R
SDA 55xx
0
EX0F
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