SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 51

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

DATA SHEET
Fig. 2–5: PC and DPTR on different banks
2.5.4.7.1. Sample Code
Fig. 2–6 shows an assembler program run, performing
the following actions:
1. Start at bank 0 at 00000.
2. Set ISR-page to bank 2.
3. Jump to bank 1 at address 25.
4. Being interrupted to bank 2 ISR.
5. Call a subprogram at bank 2 address 43.
6. After return read data from bank 2.
2.5.4.8. ROM and ROMless Version
The XROM pin determines whether the on-chip or the
off-chip ROM is accessed.
If no internal ROM is to be used, then the XROM pin
(in ROMless version) should be driven ‘low’. The con-
troller then accesses the External ROM only. In the
ROM version this pin is internally pulled high, indicat-
ing that no external ROM is available.
Fig. 2–6: Program Code
Micronas
Sept. 10, 2004; 6251-556-3DS
2.6. UART
The serial port is full duplex, meaning it can transmit
and receive simultaneously. It is also receive-buffered,
meaning it can commence reception of a second Byte
before a previously received Byte has been read from
the receive register (however, if the first Byte still hasn’t
been read by the time the reception of the second Byte
is complete, one of the Bytes will be lost). The serial
port receive and transmit registers are both accessed
at special function register SBUF. Writing to SBUF
loads the transmit register, and reading SBUF
accesses a physically separate receive register.
The frequencies and baud rates depend on the inter-
nal system clock used by the serial interface.
2.6.1. Operation Modes of the UART
The serial port can operate in 4 different modes. In all
four modes, transmission is initiated by any instruction
that uses SBUF as a destination register. Reception is
initiated in mode 0 by the condition Rl = 0 and
REN = 1. Reception is initiated in the other modes by
the incoming start bit if REN = 1.
2.6.1.1. Mode 0
Serial data enter and exit through pin RxD (P3.7). TxD
(P3.1) outputs the shift clock.
2.6.1.2. Mode 1
10 bits are transmitted (through TxD) or received
(through RxD): a start bit (0), 8 data bits (LSB first),
and a stop bit (1). On reception, the stop bit goes into
bit RB8 in special function register SCON. The baud
rate is variable.
2.6.1.3. Mode 2
11 bits are transmitted (through TxD) or received
(through RxD): a start bit (0), 8 data bits (LSB first), a
programmable 9
mission, the 9
assigned the value of 0 or 1. Or, for example, the parity
bit (P, in the PSW) could be moved into TB8. On recep-
tion, the 9
tion register SCON, while the stop bit is ignored. The
baud rate is programmable via SFR-Bit SMOD.
th
data bit goes into RB8 in the special func-
th
th
data bit, and a stop bit (1). On trans-
data bit (TB8 in SCON) can be
SDA 55xx
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