SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 48

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
2.5.2. Internal Data RAM
Internal Data RAM is split into CPU RAM and XRAM
2.5.2.1. CPU RAM
2.5.2.1.1. Address Space
The internal CPU RAM (IRAM) occupies address
space 00
regions.
The lower 128 Bytes (00
both direct and indirect register addressing method.
The upper half of 128 Bytes (80
accessed using the “register indirect method” only.
Register direct method for this address space (80
FF
2.5.2.1.2. Registers
Controller registers are also located in IRAM. Four
banks of eight registers each occupy locations 0
through 31. Only one of these banks may be enabled
at a time through a two-bit field in the PSW.
2.5.2.1.3. Bit Addressable RAM Area
128-bit locations of the on-chip RAM are accessible
through direct addressing.These bits reside in internal
data RAM at Byte locations 32 through 47.
2.5.2.1.4. Stack
The stack can be located anywhere in the internal data
RAM address space. The stack depth is limited only by
the available internal data RAM, thanks to an 8-bit re-
locatable stack pointer. The stack is used for storing
the program counter during subroutine calls and may
also be used for passing parameters. Any Byte of inter-
nal data RAM or special function registers accessible
through direct addressing can be pushed/popped. By
default Stack Pointer always has a reset value of 07
48
H
) is reserved for Special function register access.
H
to FF
H
. This space is further split into two
H
-7F
H
) can be accessed using
H
-FF
H
) can be
Sept. 10, 2004; 6251-556-3DS
H
H
.
-
2.5.2.2. Extended Data RAM (XRAM)
An additional on-chip RAM space called ‘XRAM’
extends the capacity of the internal RAM. Up to
16 KiloBytes of XRAM are accessed by MOVX
@DPTR. The XRAM is located in the upper area of the
64K address space.
1 KByte of the XRAM, called VBI Buffer, is reserved for
storing teletext data. 1 KByte of address space can be
allocated as CPU work space. Three KiloByte of RAM
are reserved as Display RAM. The rest of the RAM can
be configured either as Teletext page memory or
DRCS (Dynamically Redefinable Character Set) mem-
ory.
2.5.2.2.1. Extended Data Memory Address Map-
The XRAM is mapped in the address space from
C000
chip memory. The address space of the 16K block is
decoded starting from C000
is done independent of the memory banking. That
means that in all 16 available banks of 64K, the upper
16KByte long address space is reserved for internal
Extended data memory. This decoding method has the
advantage, that when copying data back and forth
between on-chip RAM and off-chip RAM, there is no
need to switch the memory banks.
H
to FFFF
ping
H
. 16 KBytes are implemented as on-
H
. Note that this decoding
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