SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 60

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
2.9.4.2. 14-bit PWM
The base frequency of a 14 bit resolution channel is
derived from the overflow of a eight bit counter.
On every counter overflow, the enabled PWM lines
would be set to 1 - except in the case where the com-
pare value is set to zero.
The corresponding PWCOMP14x register determines
the duty cycle of the channel. When the counter value
Table 2–36: 14-bit PWM stretching cycle relationship
2.9.5. Cycle Time
Table 2–37: Cycle time
60
PWCOMPEXT14X
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
PWM
Resolution
8 Bit
14 Bit
Slow Down
(SD)
0
1
0
1
0
1
0
1
0
1
0
1
PWM_
PR
0
0
1
1
X
X
0
0
1
1
X
X
PWM_
direct
0
0
0
0
1
1
0
0
0
0
1
1
Sept. 10, 2004; 6251-556-3DS
Cycle Stretched
1, 3, 5, 7, …, 59, 61, 63
2, 6, 10, …, 54, 58, 62
4, 12, 20, …, 52, 60
8, 24, 40, 56
16, 48
32
f
[MHz]
33.33
8.33
33.33
8.33
33.33
8.33
33.33
8.33
33.33
8.33
33.33
8.33
sys
Counting Rate
[MHz]
16.66
8.33
8.33
4.16
33.33
8.33
16.66
8.33
8.33
4.16
33.33
8.33
is equal to or greater than the compare value then the
output channel is set to zero. The duty cycle can be
adjusted in steps of fpwm as mentioned in Table 2–36.
In order to achieve the same resolution as 14bit
counter, the high time is stretched periodically by one
clock cycle. Stretching cycle is determined based on
the bit 7…1 in the corresponding PWCOMPEXT14x
register.
Base Cycle
Time
[µs]
3.84
7.68
7.68
15.37
1.92
7.68
15.37
30.7
30.7
61.4
7.68
30.7
Full Cycle
Time
[µs]
15.37
30.73
30.73
61.46
7.68
30.73
983.4
1967
1967
3934
492
1967
DATA SHEET
Micronas