DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 159

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 4: Receive SLC-96 Synchronizer Enable (RSLC96). See Section
Bits 3 and 2: Out of Frame Select Bits (OOF[2:1])
Bit 1: Receive RAI Integration Enable (RAIIE). The ESF RAI indication can be interrupted for a period not to
exceed 100ms per interruption (T1.403). In ESF mode, setting RAIIE will cause the RAI status from the DS26519
to be integrated for 200ms.
Bit 0: Receive-Side Remote Alarm Select (RRAIS)
OOF2
0
0
1
1
0 = The SLC-96 synchronizer is disabled.
1 = The SLC-96 synchronizer is enabled.
0 =
1 =
0 = Receive framer detects T1 remote alarm.
1 = Receive Framer detects J1 Remote Alarm.
OOF1
0
1
0
1
—
7
0
RAI detects when 16 consecutive patterns of 00FF appear in the FDL.
RAI clears when 14 or fewer patterns of 00FF hex out of 16 possible appear in the FDL.
RAI detects when the condition has been present for greater than 200ms.
RAI clears when the condition has been absent for greater than 200ms.
D4—Zeros in bit 2 of all channels.
ESF—00FF pattern in FDL.
D4—A one in the S-bit position of frame 12.
ESF—all ones in FDL.
OUT OF FRAME CRITERIA
2/4 frame bits in error
2/5 frame bits in error
2/6 frame bits in error
2/6 frame bits in error
T1RCR2 (T1 Mode)
Receive Control Register 2
014h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
—
6
0
—
5
0
RSLC96
159 of 310
4
0
OOF2
3
0
9.9.4.4
DS26519 16-Port T1/E1/J1 Transceiver
for SLC-96 details.
OOF1
2
0
RAIIE
1
0
RRAIS
0
0