DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 98

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
The DS26519 uses a digital clock recovery system. The resultant E1, T1 or J1 clock derived from MCLK is
multiplied by 16 via an internal PLL and fed to the clock recovery system. The clock recovery system uses the
clock from the PLL circuit to form a 16 times oversampler, which is used to recover the clock and data. This
oversampling technique offers outstanding performance to meet jitter tolerance specifications shown in
Figure
Normally, the clock that is output at the RCLKn pin is the recovered clock from the E1 AMI/HDB3 or T1 AMI/B8ZS
waveform presented at the RTIPn and RRINGn inputs. If the jitter attenuator (LTRCR) is placed in the receive path
(as is the case in most applications), the jitter attenuator restores the RCLKn to an approximate 50% duty cycle. If
the jitter attenuator is either placed in the transmit path or is disabled, the RCLKn output can exhibit slightly shorter
high cycles of the clock. This is due to the highly over-sampled digital clock recovery circuitry. See
more details. When no signal is present at RTIPn and RRINGn, a receive carrier loss (RCL) condition will occur
and the RCLKn will be derived from the MCLKT1 or MCLKE1 source (depending on the configuration).
9.12.3.2
The DS26519 will report the signal strength at RTIPn and RRINGn in approximately 2.5dB increments via RSL[3:0]
located in the LIU Receive Signal Level Register (LRSL). This feature is helpful when trouble shooting line
performance problems.
9.12.3.3
The DS26519 can receive a 2.048MHz square-wave synchronization clock as specified in Section 10 of ITU-T
G.703. To use this mode, set the receive G.703 clock bit (RG703) found in the LIU Receive Control Register
(LRCR.7).
9.12.3.4
The receive equalizer is equipped with a monitor mode function that is used to overcome the signal attenuation
caused by the resistive bridge used in monitoring applications. This function allows for a resistive gain of up to
32dB along with cable attenuation of 12dB to 30dB as shown in the LIU Receive Control Register (LRCR).
Figure 9-24. Typical Monitor Application
9.12.3.5
The DS26519 uses both the digital and analog loss-detection method in compliance with the latest T1.231 for
T1/J1 and ITU-T G.775 or ETS 300 233 for E1 mode of operation.
LOS is detected if the receiver level falls bellow a threshold analog voltage for certain duration. Alternatively, this
can be termed as having received “zeros” for a certain duration. The signal level and timing duration are defined in
accordance with the T1.231 or G.775 or ETS 300 233 specifications.
9-26.
Receive Level Indicator
Receive G.703 Section 10 Synchronization Signal
Receiver Monitor Mode
Loss of Signal
T1/E1 LINE
Rm
MONITOR
PORT JACK
Rm
PRIMARY
T1/E1 TERMINATING
DEVICE
98 of 310
X
F
M
R
SECONDARY T1/E1
TERMINATING
DEVICE
Rt
DS26519 16-Port T1/E1/J1 Transceiver
DS2651x
Table 13-3
for

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