DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 237

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 2: Transmit BERT Port Direction Control (TBPDIR)
Bit 1: Transmit BERT Port Framed/Unframed Select (TBPFUS)
Bit 0: Transmit BERT Port Enable (TBPEN)
0 = Normal (line) operation. Transmit BERT port sources data into the transmit path.
1 = System (backplane) operation. Transmit BERT port sources data into the receive path (RSERn). In this
mode, the data from the BERT is muxed into the receive path.
0 = The DS26519’s transmit BERT will not clock data into the F-bit position (framed).
1 = The DS26519’s transmit BERT will clock data into the F-bit position (unframed).
0 = Transmit BERT port is not active.
1 = Transmit BERT port is active.
7
0
TXPC
Transmit Expansion Port Control Register
18Ah + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
0
5
0
237 of 310
4
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
TBPDIR
2
0
TBPFUS
1
0
TBPEN
0
0

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