DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 22

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
TSYSCLK10
TSYSCLK11
TSYSCLK12
TSYSCLK13
TSYSCLK14
TSYSCLK15
TSYSCLK16
TSYSCLK1
TSYSCLK2
TSYSCLK3
TSYSCLK4
TSYSCLK5
TSYSCLK6
TSYSCLK7
TSYSCLK8
TSYSCLK9
TSER10
TSER11
TSER12
TSER13
TSER14
TSER15
TSER16
TCLK10
TCLK11
TCLK12
TCLK13
TCLK14
TCLK15
TCLK16
TSER1
TSER2
TSER3
TSER4
TSER5
TSER6
TSER7
TSER8
TSER9
TCLK1
TCLK2
TCLK3
TCLK4
TCLK5
TCLK6
TCLK7
TCLK8
TCLK9
NAME
W11
M18
AA3
M17
B15
D14
R12
U11
C17
E17
U21
R20
H15
G10
AB4
AB6
AB8
B21
D18
K14
P16
P21
D17
A16
V10
U14
C18
Y21
R19
E16
PIN
T10
F17
W6
W5
C1
H1
R8
N8
N7
U7
T8
E1
F7
K8
E2
L4
J1
J2
TYPE
Input
Input
Input
Transmit NRZ Serial Data. These pins are sampled on the falling edge of
TCLKn when the transmit-side elastic store is disabled. These pins are sampled
on the falling edge of TSYSCLKn when the transmit-side elastic store is enabled.
In IBO mode, data for multiple framers can be used in high-speed multiplexed
scheme. This is described in Section 9.8.2. The table there presents the
combination of framer data for each of the streams.
TSYSCLKn is used as a reference when IBO is invoked. See
Transmit Clock 1 to 16. A 1.544MHz or a 2.048MHz primary clock. Used to
clock data through the transmit side of the transceiver. TSERn data is sampled
on the falling edge of TCLKn. TCLKn is used to sample TSERn when the elastic
store is not enabled or IBO is not used. When the elastic store is enabled, TCLKn
is used as the internal transmit clock for the framer side or the elastic store
including the transmit framer and LIU. With the elastic store enabled, TCLKn can
be either synchronous or asynchronous to TSYSCLKn which either prevents or
allows for slips. In addition when IBO mode is enabled, TCLKn must be
synchronous to TSYSCLKn which prevents slips in the elastic store.
Note: This clock must be provided for proper device operation. The only
exception is when the TCR3 register is configured to source TCLK internally from
RCLK.
Transmit System Clock 1 to 16. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz,
or 16.384MHz clock. Only used when the transmit-side elastic store function is
enabled. Should be tied low in applications that do not use the transmit-side
elastic store. The clock can be 4.096MHz, 8.912MHz, or 16.384MHz when IBO
mode is used.
TRANSMIT FRAMER
22 of 310
FUNCTION
DS26519 16-Port T1/E1/J1 Transceiver
Table
9-8.

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