DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 241

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
The interrupt information register provides an indication of which status registers are generating an interrupt. When
an interrupt occurs, the host can read TIIR to quickly identify which of the transmit status registers are causing the
interrupt(s). These are real-time registers in that the bits will clear once the appropriate interrupt has been serviced
and cleared.
Bit 2: Transmit Latched Status Register 3 Interrupt Status (TLS3)
Bit 1: Transmit Latched Status Register 2 Interrupt Status (TLS2)
Bit 0: Transmit Latched Status Register 1 Interrupt Status (TLS1)
0 = No interrupt pending.
1 = Interrupt pending.
0 = No interrupt pending.
1 = Interrupt pending.
0 = No interrupt pending.
1 = Interrupt pending.
—
7
0
TIIR
Transmit Interrupt Information Register
19Fh + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
—
6
0
—
5
0
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—
4
0
—
3
0
DS26519 16-Port T1/E1/J1 Transceiver
TLS3
2
0
TLS2
1
0
TLS1
0
0