DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 243

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 4: Transmit FDL Register Empty (TFDLE) (T1 Mode Only)
Bit 3: Transmit FIFO Underrun Event (TUDR)
Bit 2: Transmit Message End Event (TMEND)
Bit 1: Transmit FIFO Below Low Watermark Set Condition (TLWMS)
Bit 0: Transmit FIFO Not Full Set Condition (TNFS)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0: Loss of Frame Synchronization Detect (LOFD)
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
—
—
—
7
0
7
0
TIM2
Transmit Interrupt Mask Register 2
1A1h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
TIM3
Transmit Interrupt Mask Register 3 (Synchronizer)
1A2h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
—
—
—
6
0
6
0
—
—
—
5
0
5
0
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TFDLE
—
—
4
0
4
0
TUDR
TUDR
—
3
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
TMEND
TMEND
—
2
0
2
0
TLWMS
TLWMS
—
1
0
1
0
TNFS
TNFS
LOFD
0
0
0
0