DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 266

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 6: BERT Bit Error Detected Event (BBED). A bit that is set when a bit error is detected. The receive BERT
must be in synchronization for it to detect bit errors.
Bit 5: Real-Time BERT All Zeros or Ones (RBA01). ORed real-time status of all-zeros detection and all-ones
detection.
Bit 4:Real-Time Sync (RSYNC). Real-time sync status. A zero indicates not synchronized and a one indicates
synchronization state.
Bit 3: BERT Receive All-Ones Condition (BRA1). A latched bit that is set when 32 consecutive ones are
received.
Bit 2: BERT Receive All-Zeros Condition (BRA0). A latched bit that is set when 32 consecutive zeros are
received.
Bit 1: BERT Receive Loss of Synchronization Condition (BRLOS). A latched bit that is set whenever the
receive BERT begins searching for a pattern.
Bit 0: BERT in Synchronization Condition (BSYNC). A latched bit that is set when the incoming pattern matches
for 32 consecutive bit positions.
—
7
0
BSR
BERT Status Register
110Eh + (10h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
BBED
6
0
RBA01
5
0
RSYNC
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4
0
BRA1
3
0
DS26519 16-Port T1/E1/J1 Transceiver
BRA0
2
0
BRLOS
1
0
BSYNC
0
0