DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 254

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 1: Open-Circuit Status (OCS). A real-time bit that is set when the LIU detects that the TTIPn and TRINGn
outputs are open-circuited.
Bit 5: Over Equalized (OEQ). The equalizer is over equalized. This can happen if there very are large unexpected
resistive loss. This could result if monitor mode is used and the device is not placed in monitor mode. This indicator
provides more qualitative information to the receive loss indicators.
Bit 4: Under Equalized (UEQ). The equalizer is under equalized. A signal with a very high resistive gain is being
applied. This indicator provides more qualitative information to the receive loss indicators.
Bit 3: Receive Short-Circuit Status (RSCS). A real-time bit set when the LIU detects that the RTIPn and RRINGn
inputs are short-circuited. The load resistance has to be 25 Ω (typically) or less for short-circuit detection.
Bit 2: Transmit Short-Circuit Status (TSCS). A real-time bit set when the LIU detects that the TTIPn and
TRINGn outputs are short-circuited. The load resistance has to be 25 Ω (typically) or less for short-circuit detection.
Bit 0: Loss of Signal Status ( LOSS). A real-time bit that is set when the LIU detects an LOS condition at RTIPn
and RRINGn.
7
0
LRSR
LIU Real Status Register
1003h + (20h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
0
OEQ
5
0
254 of 310
UEQ
4
0
RSCS
3
0
DS26519 16-Port T1/E1/J1 Transceiver
TSCS
2
0
OCS
1
0
LOSS
0
0

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