DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 186

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 2 to 0: Receive Spare Code Length Definition Bits (RSC[2:0])
Bit #
Name
Default
Bit 2: Receive BERT Port Direction Control (RBPDIR)
Bit 1: Receive BERT Port Framed/Unframed Select (RBPFUS) (T1 Mode Only)
Bit 0: Receive BERT Port Enable (RBPEN)
RSC2
0
0
0
0
1
1
1
1
0 = Normal (line) operation. Rx BERT port receives data from the receive framer.
1 = System (backplane) operation. Rx BERT port receives data from the transmit path. The transmit path
enters the receive BERT on the line side of the elastic store (if enabled).
0 = The DS26519’s receive BERT will not clock data from the F-bit position (framed).
1 = The DS26519’s receive BERT will clock data from the F-bit position (unframed).
0 = Receive BERT port is not active.
1 = Receive BERT port is active.
RSC1
0
0
1
1
0
0
1
1
—
—
—
7
0
7
0
RSC0
0
1
0
1
0
1
0
1
T1RSCC (T1 Mode Only)
In-Band Receive Spare Control Register
089h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
RXPC
Receive Expansion Port Control Register
08Ah + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
—
—
—
6
0
6
0
LENGTH SELECTED
—
—
—
5
0
5
0
8 : 16 bits
1 bits
2 bits
3 bits
4 bits
5 bits
6 bits
7 bits
186 of 310
—
—
—
4
0
4
0
—
—
—
3
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
RBPDIR
RBPDIR
RSC2
2
0
2
0
RBPFUS
RSC1
—
1
0
1
0
RBPEN
RBPEN
RSC0
0
0
0
0