DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 278

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

11.3
Figure 11-17. E1 Receive-Side Timing
Figure 11-18. E1 Receive-Side Boundary Timing (Elastic Store Disabled)
RCHCLKn
RCHBLKn
RFSYNCn
RSYNCn
RSYNCn
RSYNCn
RFSYNCn
E1 Receiver Functional Timing Diagrams
FRAME#
RCLKn
RSERn
RSIGn
NOTE 1: RCHBLKn IS PROGRAMMED TO BLOCK CHANNEL 1.
NOTE 2: SHOWN IS AN RNAF FRAME BOUNDARY.
NOTE 3. RSIGn NORMALLY CONTAINS THE CAS MULTIFRAME ALIGNMENT NIBBLE (0000) IN CHANNEL 1.
1
1
1
2
NOTE 1: RSYNCn IN FRAME MODE (RIOCR.0 = 0).
NOTE 2: RSYNCn IN MULTIFRAME MODE (RIOCR.0 = 1).
NOTE 3: THIS DIAGRAM ASSUMES THE CAS MF BEGINS IN THE RAF FRAME.
1
CHANNEL 32
CHANNEL 32
2
A
B
3
C
4
LSB
D
5
Si
6
1
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7
A Sa4 Sa5 Sa6 Sa7 Sa8
8
CHANNEL 1
CHANNEL 1
9
Note 3
10 11 12 13 14 15 16
DS26519 16-Port T1/E1/J1 Transceiver
MSB
CHANNEL 2
CHANNEL 2
A
B
1