DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 223
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 223 of 310
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Si Bit of Frame 14 (TSiF14)
Bit 6: Si Bit of Frame 12 (TSiF12)
Bit 5: Si Bit of Frame 10 (TSiF10)
Bit 4: Si Bit of Frame 8 (TSiF8)
Bit 3: Si Bit of Frame 6 (TSiF6)
Bit 2: Si Bit of Frame 4 (TSiF4)
Bit 1: Si Bit of Frame 2 (TSiF2)
Bit 0: Si Bit of Frame 0 (TSiF0)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Si Bit of Frame 15 (TSiF15)
Bit 6: Si Bit of Frame 13 (TSiF13)
Bit 5: Si Bit of Frame 11 (TSiF11)
Bit 4: Si Bit of Frame 9 (TSiF9)
Bit 3: Si Bit of Frame 7 (TSiF7)
Bit 2: Si Bit of Frame 5 (TSiF5)
Bit 1: Si Bit of Frame 3 (TSiF3)
Bit 0: Si Bit of Frame 1 (TSiF1)
TSiF14
TSiF15
7
0
7
0
E1TSiAF (E1 Mode)
Transmit Si Bits of the Align Frame Register
166h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
E1TSiNAF (E1 Mode Only)
Transmit Si Bits of the Non-Align Frame Register
167h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
TSiF12
TSiF13
6
0
6
0
TSiF10
TSiF11
5
0
5
0
223 of 310
TSiF8
TSiF9
4
0
4
0
TSiF6
TSiF7
3
0
3
0
DS26519 16-Port T1/E1/J1 Transceiver
TSiF4
TSiF5
2
0
2
0
TSiF2
TSiF3
1
0
1
0
TSiF0
TSiF1
0
0
0
0
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