DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 178

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for T1 mode. See RCR1.
Bit 6: Receive HDB3 Enable (RHDB3)
Bit 5: Receive Signaling Mode Select (RSIGM)
Bit 4: Receive G.802 Enable (RG802). See
Bit 3: Receive CRC-4 Enable (RCRC4)
Bit 2: Frame Resync Criteria (FRC)
Bit 1: Sync Enable (SYNCE)
Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the receive-side framer is
initiated. Must be cleared and set again for a subsequent resync.
0 = HDB3 disabled.
1 = HDB3 enabled (decoded per O.162).
0 = CAS signaling mode.
1 = CCS signaling mode.
0 = Do not force RCHBLKn high during bit 1 of time slot 26.
1 = Force RCHBLKn high during bit 1 of time slot 26.
0 = CRC-4 disabled.
1 = CRC-4 enabled.
0 = Resync if FAS received in error three consecutive times.
1 = Resync if FAS or bit 2 of non-FAS is received in error three consecutive times.
0 = Auto resync enabled.
1 = Auto resync disabled.
—
7
0
RCR1 (E1 Mode)
Receive Control Register 1
081h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
RHDB3
6
0
RSIGM
5
0
Figure 11-30
178 of 310
RG802
4
0
for details.
RCRC4
3
0
DS26519 16-Port T1/E1/J1 Transceiver
FRC
2
0
SYNCE
1
0
RESYNC
0
0