DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 35

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

Figure 9-5. SPI Serial Port Access for Write Mode, SPI_CPOL = 0, SPI_CPHA = 0
SPI_SCLK
SPI_MOSI
SPI_MISO
Figure 9-6. SPI Serial Port Access for Write Mode, SPI_CPOL = 1, SPI_CPHA = 0
SPI_SCLK
SPI_MOSI
SPI_MISO
Figure 9-7. SPI Serial Port Access for Write Mode, SPI_CPOL = 0, SPI_CPHA = 1
Figure 9-8. SPI Serial Port Access for Write Mode, SPI_CPOL = 1, SPI_CPHA = 1
9.2
The user should provide a system clock to the MCLK input of 2.048MHz, 1.544MHz, or a multiple of up to 8x the T1
and E1 frequencies. To meet many specifications, the MCLK source should have ±50ppm accuracy.
9.2.1 Backplane Clock Generation
The DS26519 provides facility for provision of BPCLK[2:1] at 2.048MHz, 4.096MHz, 8.192MHz, 16.384MHz (see
Figure
SPI_SCLK
SPI_MOSI
SPI_MISO
SPI_MOSI
SPI_MISO
SPI_SCLK
CSB
CSB
CSB
CSB
9-9). The Global Transceiver Clock Control Register 1 (GTCCR1) is used to control the backplane clock
Clock Structure
MSB
MSB
MSB
MSB
0
0
0
0
A13
A13
A13
A13
A12
A12
A12
A12
A11
A11
A11
A11
A10
A10
A10
A10
A9
A9
A9
A9
A8
A8
A8
A8
LSB
LSB
LSB
LSB
A7
A7
A7
A7
MSB
MSB
MSB
MSB
A6
A6
A6
A6
A5
A5
A5
A5
35 of 310
A4
A4
A4
A4
A3
A3
A3
A3
A2
A2
A2
A2
A1
A1
A1
A1
A0
A0
A0
A0
DS26519 16-Port T1/E1/J1 Transceiver
LSB
LSB
LSB
LSB
B
B
B
B
MSB
MSB
MSB
MSB
D7
D7
D7
D7
D6
D6
D6
D6
D5
D5
D5
D5
D4
D4
D4
D4
D3
D3
D3
D3
D2
D2
D2
D2
D1
D1
D1
D1
LSB
LSB
LSB
LSB
D0
D0
D0
D0