DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 320

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

P3DDR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It retains its prior state after
a manual reset*, and in software standby mode. As the SCI is initialized, the pin states are determined by the P3DDR and
P3DR specifications.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 3 Data Register (P3DR)
P3DR is an 8-bit readable/writable register that stores output data for the port 3 pins (P3
Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.
P3DR is initialized to H'00 (bits 5 to 0) by a power-on reset, and in hardware standby mode. It retains its prior state after a
manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 3 Register (PORT3)
Note: * Determined by state of pins P3
PORT3 is an 8-bit read-only register that shows the pin states. Writing of output data for the port 3 pins (P3
always be performed on P3DR.
Bits 7 and 6 are reserved; they return an undetermined value if read, and cannot be modified.
If a port 3 read is performed while P3DDR bits are set to 1, the P3DR values are read. If a port 3 read is performed while
P3DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT3 contents are determined by the pin states, as P3DDR and
P3DR are initialized. PORT3 retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 3 Open Drain Control Register (P3ODR)
P3ODR is an 8-bit readable/writable register that controls the PMOS on/off status for each port 3 pin (P3
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REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
:
:
Undefined Undefined
Undefined Undefined
Undefined Undefined
—
—
—
—
—
—
7
7
7
—
—
—
—
—
—
6
6
6
P35ODR P34ODR P33ODR P32ODR P31ODR P30ODR
5
P35DR
to P3
R/W
R/W
P35
—*
5
0
5
R
5
0
0
.
P34DR
R/W
R/W
P34
—*
4
0
4
R
4
0
P33DR
R/W
R/W
P33
—*
3
0
3
R
3
0
P32DR
R/W
R/W
P32
—*
2
0
2
R
2
0
P31DR
R/W
R/W
P31
—*
1
0
1
R
1
0
5
to P3
P30DR
R/W
R/W
P30
—*
0
0
0
R
0
0
0
).
5
to P3
5
to P3
0
).
0
) must