DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 499

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2
14.2.1
RSR is a register used to receive serial data.
The SCI sets serial data input from the RxD pin in RSR in the order received, starting with the LSB (bit 0), and converts it
to parallel data. When one byte of data has been received, it is transferred to RDR automatically.
RSR cannot be directly read or written to by the CPU.
14.2.2
RDR is a register that stores received serial data.
When the SCI has received one byte of serial data, it transfers the received serial data from RSR to RDR where it is stored,
and completes the receive operation. After this, RSR is receive-enabled.
Since RSR and RDR function as a double buffer in this way, enables continuous receive operations to be performed.
RDR is a read-only register, and cannot be written to by the CPU.
RDR is initialized to H'00 by a reset, and in standby mode or module stop mode.
14.2.3
TSR is a register used to transmit serial data.
To perform serial data transmission, the SCI first transfers transmit data from TDR to TSR, then sends the data to the TxD
pin starting with the LSB (bit 0).
When transmission of one byte is completed, the next transmit data is transferred from TDR to TSR, and transmission
started, automatically. However, data transfer from TDR to TSR is not performed if the TDRE bit in SSR is set to 1.
TSR cannot be directly read or written to by the CPU.
Bit
Initial value :
R/W
Bit
R/W
Bit
R/W
Register Descriptions
Receive Shift Register (RSR)
Receive Data Register (RDR)
Transmit Shift Register (TSR)
:
:
:
:
:
:
—
—
7
7
0
R
7
—
—
6
6
0
R
6
—
—
5
5
0
R
5
—
—
4
4
0
R
4
—
—
3
3
0
R
3
—
—
2
2
0
R
2
—
—
Rev.6.00 Oct.28.2004 page 469 of 1016
1
1
0
R
1
—
—
0
0
0
R
0
REJ09B0138-0600H