DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 674

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

19.19.3 Error Protection
In error protection, an error is detected when MCU runaway occurs during flash memory programming/erasing, or
operation is not performed in accordance with the program/erase algorithm, and the program/erase operation is aborted.
Aborting the program/erase operation prevents damage to the flash memory due to overprogramming or overerasing.
If the MCU malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in FLMCR2 and the error
protection state is entered. The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained, but program mode or erase
mode is aborted at the point at which the error occurred. Program mode or erase mode cannot be re-entered by re-setting
the P or E bit. However, PV and EV bit setting is enabled, and a transition can be made to verify mode.
FLER bit setting conditions are as follows:
Error protection is released only by a reset and in hardware standby mode.
Figure 19-50 shows the flash memory state transition diagram.
Rev.6.00 Oct.28.2004 page 644 of 1016
REJ09B0138-0600H
When flash memory is read during programming/erasing (including a vector read or instruction fetch)
Immediately after exception handling (excluding a reset) during programming/erasing
When a SLEEP instruction (including software standby) is executed during programming/erasing
When the CPU loses the bus during programming/erasing
Legend:
RD: Memory read possible
VF: Verify-read possible
PR: Programming possible
ER: Erasing possible
Normal operating mode
RD VF PR ER
Program mode
occurrence
Erase mode
FLER = 0
Error protection mode
RD VF PR ER
Error
FLER = 1
Figure 19-50 Flash Memory State Transitions
Error occurrence
(software standby)
RD: Memory read not possible
VF: Verify-read not possible
PR: Programming not possible
ER: Erasing not possible
RES = 0 or STBY = 0
Software
standby mode
Software standby
mode release
RES = 0 or
STBY = 0
RES = 0 or
STBY = 0
FLMCR1, FLMCR2 (except FLER
bit), EBR1, EBR2 initialization state
Error protection mode
(software standby)
Reset or hardware standby
RD VF PR ER
(hardware protection)
FLER = 1
RD VF PR ER
FLER = 0
FLMCR1, FLMCR2,
EBR1, EBR2
initialization state