DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 991

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

TSR1—Timer Status Register 1
TCNT1—Timer Counter 1
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
Note: *
:
:
:
Count Direction Flag
TCFD
:
:
:
This timer counter can be used as an up/down-counter only in phase counting
mode or when performing overflow/underflow counting on another channel. In
other cases it functions as an up-counter.
0
1
7
1
R
R/W
15
0
TCNT counts down
TCNT counts up
R/W
—
—
6
1
14
0
R/W
Underflow Flag
R/(W)*
TCFU
13
0
1
0
5
0
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
R/W
12
0
Overflow Flag
R/(W)*
TCFV
0
1
4
0
R/W
11
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
0
R/W
—
—
3
0
H'FFE5
H'FFE6
10
0
R/W
Up/down-counter*
9
0
—
—
2
0
R/W
8
0
Input Capture/Output Compare Flag B
R/(W)*
TGFB
0
1
1
0
R/W
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
Input Capture/Output Compare Flag A
7
0
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
0
1
R/(W)*
TGFA
R/W
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC is activated by TGIA interrupt
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
6
0
as output compare register
input capture signal while TGRA is functioning
as input capture register
DISEL bit of MRB in DTC is 0
while DTA bit of DMABCR in DMAC is 1
TGFA = 1
R/W
5
0
Rev.6.00 Oct.28.2004 page 961 of 1016
R/W
4
0
R/W
3
0
TPU1
TPU1
R/W
2
0
R/W
1
0
REJ09B0138-0600H
R/W
0
0