DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 67

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Type
Arithmetic
operations
Logic
operations
Shift
operations
Instruction
DIVXU
DIVXS
CMP
NEG
EXTU
EXTS
TAS
AND
OR
XOR
NOT
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
Size*
B/W
B/W
B/W/L
B/W/L
W/L
W/L
B
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
1
Function
Rd
Performs unsigned division on data in two general
registers: either 16 bits
remainder or 32 bits
bit remainder.
Rd
Performs signed division on data in two general
registers: either 16 bits
remainder or 32 bits
bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
0 – Rd
Takes the two's complement (arithmetic complement) of
data in a general register.
Rd (zero extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
Rd (sign extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
@ERd – 0, 1
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
Rd
Performs a logical AND operation on a general register
and another general register or immediate data.
Rd
Performs a logical OR operation on a general register
and another general register or immediate data.
Rd
Performs a logical exclusive OR operation on a general
register and another general register or immediate data.
¬ (Rd)
Takes the one's complement of general register
contents.
Rd (shift)
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (shift)
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (rotate)
Rotates general register contents.
1-bit or 2-bit rotation is possible.
Rd (rotate)
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
Rs
Rs
Rs
Rs
Rs
(Rd)
Rd
Rd
Rd
Rd, Rd
Rd, Rd
Rd, Rd
Rd
Rd
Rd
Rd
(<bit 7> of @ERd)*
16 bits
16 bits
#IMM
#IMM
Rd
Rd
#IMM
8 bits
8 bits
Rev.6.00 Oct.28.2004 page 37 of 1016
Rd
Rd
Rd
16-bit quotient and 16-
16-bit quotient and 16-
8-bit quotient and 8-bit
8-bit quotient and 8-bit
2
REJ09B0138-0600H