DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 969

IC H8S MCU FLASH 5V 128K 128QFP

DF2357F20

Manufacturer Part Number
DF2357F20
Description
IC H8S MCU FLASH 5V 128K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2357F20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2357F20
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
DF2357F20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TCR0—Time Control Register 0
TCR1—Time Control Register 1
Bit
Initial value
Read/Write
:
:
:
Compare Match Interrupt Enable B
CMIEB
R/W
0
1
7
0
CMFB interrupt requests (CMIB) are disabled
CMFB interrupt requests (CMIB) are enabled
CMIEA
Compare Match Interrupt Enable A
R/W
0
1
6
0
CMFA interrupt requests (CMIA) are disabled
CMFA interrupt requests (CMIA) are enabled
Timer Overflow Interrupt Enable
OVIE
R/W
0
1
5
0
OVF interrupt requests (OVI) are disabled
OVF interrupt requests (OVI) are enabled
CCLR1
Counter Clear
R/W
4
0
0
1
H'FFB0
H'FFB1
0
1
0
1
CCLR0
R/W
3
0
Clear is disabled
Clear by compare match A
Clear by compare match B
Clear by rising edge of external reset input
Note: *
CKS2
R/W
Clock Select
0
1
2
0
If the count input of channel 0 is the TCNT1 overflow
signal and that of channel 1 is the TCNT0 compare
match signal, no incrementing clock is generated.
Do not use this setting.
0
1
0
1
CKS1
R/W
1
0
0
1
0
1
0
1
0
1
8-Bit Timer Channel 0
8-Bit Timer Channel 1
Internal clock: counted at falling edge
of ø/8
Internal clock: counted at falling edge
of ø/64
Internal clock: counted at falling edge
of ø/8192
External clock: counted at rising edge
External clock: counted at falling edge
External clock: counted at both rising and
falling edges
Clock input disabled
For channel 0:
Count at TCNT1 overflow signal*
For channel 1:
Count at TCNT0 compare match A*
CKS0
R/W
0
0
Rev.6.00 Oct.28.2004 page 939 of 1016
REJ09B0138-0600H

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