DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 515

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

14.2.9
SCMR selects LSB-first or MSB-first by means of bit SDIR. Except in the case of asynchronous mode 7-bit data, LSB-
first or MSB-first can be selected regardless of the serial communication mode. The descriptions in this chapter refer to
LSB-first transfer.
For details of the other bits in SCMR, see section 15.2.1, Smart Card Mode Register (SCMR).
SCMR is initialized to H'F2 by a reset, and by putting the device in standby mode or module stop mode. In the H8S/2398,
H8S/2394, H8S/2392, and H8S/2390, however, the value in SCMR is initialized to H'F2 by a reset, or in hardware standby
mode, but SCMR retains its current state when the device enters software standby mode or module stop mode.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion format.
This bit is valid when 8-bit data is used as the transmit/receive format.
Bit 2—Smart Card Data Invert (SINV): When the Smart Card interface operates as a normal SCI, 0 should be written to
this bit.
Bit 1—Reserved: This bit cannot be modified always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): When the Smart Card interface operates as a normal SCI, 0 should
be written to this bit.
Bit
Initial value :
R/W
Smart Card Mode Register (SCMR)
Bit 3
SDIR
0
1
:
:
—
—
7
1
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
—
—
6
1
—
—
5
1
—
—
4
1
SDIR
R/W
3
0
SINV
R/W
2
0
—
—
Rev.6.00 Oct.28.2004 page 485 of 1016
1
1
SMIF
R/W
0
0
(Initial value)
REJ09B0138-0600H