DF2357F20 Renesas Electronics America, DF2357F20 Datasheet - Page 407

• Manufacturer Part Number: DF2357F20
• Description: IC H8S MCU FLASH 5V 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2357F20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.4.3
In synchronous operation, the values in a number of TCNT counters can be rewritten simultaneously (synchronous
presetting). Also, a number of TCNT counters can be cleared simultaneously by making the appropriate setting in TCR
(synchronous clearing).
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 5 can all be designated for synchronous operation.
Example of Synchronous Operation Setting Procedure: Figure 10-14 shows an example of the synchronous operation
setting procedure.
Example of Synchronous Operation: Figure 10-15 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to 2, TGR0B compare
match has been set as the channel 0 counter clearing source, and synchronous clearing has been set for the channel 1 and 2
counter clearing sources.
Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this time, synchronous
presetting, and synchronous clearing by TGR0B compare match, is performed for channel 0 to 2 TCNT counters, and the
data set in TGR0B is used as the PWM cycle.
Synchronous Operation
<Synchronous presetting>
[1]
[2]
[3]
[4]
[5]
Synchronous presetting
Synchronous operation
Set synchronous
Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
operation.
When the TCNT counter of any of the channels designated for synchronous operation is
written to, the same value is simultaneously written to the other TCNT counters.
Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare,
etc.
Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing
source.
Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
Set TCNT
operation
selection
Figure 10-14 Example of Synchronous Operation Setting Procedure
[1]
[2]
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
Start count
channel?
Clearing
Yes
No
[3]
[5]
<Synchronous clearing>
Rev.6.00 Oct.28.2004 page 377 of 1016
Set synchronous
counter clearing
Start count
REJ09B0138-0600H
[4]
[5]