EM357-MOD-LR-ANT-TG Ember, EM357-MOD-LR-ANT-TG Datasheet - Page 136

MODULE EM357 PA/LNA W/ANT TG

EM357-MOD-LR-ANT-TG

Manufacturer Part Number
EM357-MOD-LR-ANT-TG
Description
MODULE EM357 PA/LNA W/ANT TG
Manufacturer
Ember
Datasheets

Specifications of EM357-MOD-LR-ANT-TG

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
25mA
Current - Transmitting
42mA
Data Interface
PCB, Surface Mount
Memory Size
192kB Flash, 12kB RAM
Antenna Connector
On-Board, Chip
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Applications
-
Sensitivity
-
Other names
636-1020
EM351 / EM357
Figure 9-16. Control Circuit in External Clock Mode 2
9.3.4
Capture/Compare Channels
Each capture/compare channel is built around a capture/compare register including a shadow register, an
input stage for capture with digital filter, multiplexing and prescaler, and an output stage with comparator
and output control.
Figure 9-17 gives an overview of the input stage of one capture/compare channel. The input stage samples the
corresponding TIy input to generate a filtered signal (TIyF). Then an edge detector with polarity selection
generates a signal (TIyFPy) which can be used either as trigger input by the slave mode controller or as the
capture command. It is prescaled before the capture register (ICyPS).
Figure 9-17. Capture/Compare Channel (Example: Channel 1 Input Stage)
The output stage generates an intermediate reference signal, OCyREF, which is only used internally. OCyREF is
always active high, but it may be inverted to create the output signal, OCy, that controls a GPIO output.
Figure 9-18 shows the basic elements of a capture/compare channel.
9-12
120-035X-000G
Final

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