AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 103

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AD9548/PCBZ

Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9548/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 148. EEPROM Storage Sequence for Profile 2 and Profile 3 Settings
Address
0E25
0E26
0E27
Table 149. EEPROM Storage Sequence for Profile 4 and Profile 5 Settings
Address
0E28
0E29
0E2A
Table 150. EEPROM Storage Sequence for Profile 6 and Profile 7 Settings
Address
0E2B
0E2C
0E2D
0E2E
Bits
[7:0]
[7:0]
[7:0]
Bits
[7:0]
[7:0]
[7:0]
Bits
[7:0]
[7:0]
[7:0]
[7:0]
Bit Name
Profile 2 and Profile 3
Profile 2 and Profile 3
Bit Name
Profile 4 and Profile 5
Profile 4 and Profile 5
Bit Name
Profile 6 and Profile 7
Profile 6 and Profile 7
I/O update
Description
The default value of this register is 0x63, which the controller interprets as a data
instruction. Its decimal value is 99, which tells the controller to transfer 100 bytes of
data (99 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x63 in the EEPROM and increments the EEPROM address pointer.
The default value of these two registers is 0x0680. Note that Register 0E26 and
Register 0E27 are the most significant and least significant bytes of the target
these two registers define a starting address (in this case, 0x0680). The controller
stores 0x0680 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 100 bytes from the register map (beginning at Address 0x0680) to the
EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and
Profile 3 parameters in the register map.
Description
The default value of this register is 0x63, which the controller interprets as a data
instruction. Its decimal value is 99, which this tells the controller to transfer 100
bytes of data (99 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x63 in the EEPROM and increments the EEPROM address pointer.
The default value of these two registers is 0x0700. Note that Register 0E29 and
Register 0E2A are the most significant and least significant bytes of the target
address, respectively. Because the previous register contains a data instruction,
these two registers define a starting address (in this case, 0x0700). The controller
stores 0x0700 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 100 bytes from the register map (beginning at Address 0x0700) to the
EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and
one checksum byte). The 99 bytes transferred correspond to the Profile 4 and
Profile 5 parameters in the register map.
Description
The default value of this register is 0x63, which the controller interprets as a data
instruction. Its decimal value is 99, which this tells the controller to transfer 100
bytes of data (99 + 1) beginning at the address specified by the next two bytes. The
controller stores 0x63 in the EEPROM and increments the EEPROM address pointer.
The default value of these two registers is 0x0780. Note that Register 0E2C and
Register 0E2C are the most significant and least significant bytes of the target
these two registers define a starting address (in this case, 0x0780). The controller
stores 0x0780 in the EEPROM and increments the EEPROM pointer by 2. It then
transfers 100 bytes from the register map (beginning at Address 0x0780) to the
EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and
one checksum byte). The 99 bytes transferred correspond to the Profile 6 and
Profile 7 parameters in the register map.
The default value of this register is 0x80, which the controller interprets as an I/O
update instruction. The controller stores 0x80 in the EEPROM and increments the
EEPROM address pointer.
address, respectively. Because the previous register contains a data instruction,
one checksum byte). The 99 bytes transferred correspond to the Profile 2 and
address, respectively. Because the previous register contains a data instruction,
Rev. A | Page 103 of 112
AD9548

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