AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 72

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9548
Table 45. Nominal System Clock (SYSCLK) Period
Address
0103
0104
0105
1
Table 46. System Clock Stability Period
Address
0106
0107
0108
1
GENERAL CONFIGURATION (REGISTER 0200 TO REGISTER 0214)
Register 0200 to Register 0207—Multifunction Pin Control (M0 to M7)
Table 47. Multifunction Pin (M0 to M7) Control
Address
0200
0201
0202
0203
0204
0205
0206
0207
1
Table 48. IRQ Pin Output Mode
Address
0208
Units are femtoseconds. The default value is 0x0F424 = 1,000,000 (1 ns) and implies a system clock frequency of 1 GHz.
Units are milliseconds. The default value is 0x000001 = 1 (1 ms).
The default setting for all the multifunction pins is as an unused control input pin.
Bits
[7:0]
[7:0]
[7:5]
[4:0]
Bits
[7:0]
[7:0]
[7:4]
[3:0]
Bits
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
[7]
[6:0]
Bits
[7:2]
[1:0]
Bit Name
System clock period
(expressed in
femtoseconds)
Unused
System clock period
Bit Name
System clock stability
period
Unused
System clock stability
period
Bit Name
M0 in/out
M0 function
M1 in/out
M1 function
M2 in/out
M2 function
M3 in/out
M3 function
M4 in/out
M4 function
M5 in/out
M5 function
M6 in/out
M6 function
M7 in/out
M7 function
Bit Name
Unused
IRQ pin output mode
1
1
1
Description
System clock period, Bits[7:0]
System clock period, Bits[15:8]
System clock period, Bits[20:16]
Description
System clock stability period, Bits[7:0] (default = 0x01)
System clock stability period, Bits[15:8] (default = 0x00)
System clock stability period, Bits[19:16] (default = 0x0)
(default period = 0x00001, or 1 ms)
In/out control for the M0 pin
0 (default) = input (control pin)
1 = output (status pin)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M1 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M2 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M3 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M4 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M5 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M6 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
In/out control for the M7 pin (same as M0)
See Table 24 and Table 25 (default = 0xb0000000)
Description
Select the output mode of the IRQ pin
00 (default) = NMOS, open drain (requires an external pull-up resistor)
01 = PMOS, open drain (requires an external pull-down resistor)
10 = CMOS, active high
11 = CMOS, active low
Description
Rev. A | Page 72 of 112