AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 17

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin No.
53
56, 75
59
57, 58
60, 66, 67,
73
61
62
63, 70, 74
64
65
68
69
71
72
76
78, 79, 80,
81, 84, 85,
86, 87
EP
Mnemonic
SYSCLKP
NC
AVDD
TDC_VRB,
TDC_VRT
AVDD3
REFA
REFAA
AVDD
REFB
REFBB
REFC
REFCC
REFD
REFDD
IRQ
M0, M1, M2,
M3, M4, M5,
M6, M7
VSS
Input/
Output
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I/O
O
Differential
input
Power
Power
Differential
input
Differential
input
Power
Differential
input
Differential
input
Differential
input
Differential
input
Differential
input
Differential
input
Logic
3.3 V CMOS
Exposed
pad
Pin Type
Description
System Clock Input. SYSCLKP contains internal dc biasing and should be ac-
coupled with a 0.01 μF capacitor, except when using a crystal, in which case
connect the crystal across SYSCLKP and SYSCLKN. Single-ended 1.8 V CMOS is
also an option but can introduce a spur if the duty cycle is not 50%. When using
SYSCLKP as a single-ended input, connect a 0.01 μF capacitor from SYSCLKN to
ground.
No Connection. These pins should be left floating.
1.8 V Analog Power Supply.
Use capacitive decoupling on these pins (see Figure 38).
3.3 V Analog (Reference Input) Power Supply.
Reference A Input. This internally biased input is typically ac-coupled and, when
configured as such, can accept any differential signal with single-ended swing up
to 3.3 V. If dc-coupled, input can be LVPECL, CMOS, or LVDS.
Complementary Reference A Input. Complementary signal to the input provided
on Pin 61. The user can configure this pin as a separate single-ended input.
1.8 V Analog (Reference Input) Power Supply.
Reference B Input. This internally biased input is typically ac-coupled and, when
configured as such, can accept any differential signal with single-ended swing up
to 3.3 V. If dc-coupled, input can be LVPECL, CMOS, or LVDS.
Complementary Reference B Input. Complementary signal to the input provided
on Pin 64. The user can configure this pin as a separate single-ended input.
Reference C Input. This internally biased input is typically ac-coupled and, when
configured as such, can accept any differential signal with single-ended swing up
to 3.3 V. If dc-coupled, input can be LVPECL, CMOS, or LVDS.
Complementary Reference C Input. Complementary signal to the input provided
on Pin 68. The user can configure this pin as a separate single-ended input.
Reference D Input. This internally biased input is typically ac-coupled and, when
configured as such, can accept any differential signal with single-ended swing up
to 3.3 V. If dc-coupled, input can be LVPECL, CMOS, or LVDS.
Complementary Reference D Input. Complementary signal to the input provided
on Pin 71. The user can configure this pin as a separate single-ended input.
Interrupt Request Line.
Configurable I/O Pins. These pins are configured under program control.
The exposed pad must be connected to ground (VSS).
Rev. A | Page 17 of 112
AD9548