AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 28

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9548
The main feature to note is that any time faulted = 1, the output
latch is reset, which forces valid = 0 (indicating an invalid reference)
regardless of the state of any other signal. Under the default
condition (that is, all three control bits are 0), the reference
monitor is the primary source of the validation process. This is
because, under the default condition, the ref fault signal from
the reference monitor is identically equal to the faulted signal.
The function of the faulted signal is fourfold.
The ref monitor bypass control bit enables bypassing of the ref
fault signal generated by the reference monitor. When ref
monitor bypass = 1, the state of the faulted signal is dictated by
the ref monitor override control bit. This is useful when the
user relies on an external reference monitor rather than the
internal monitor resident in the device. The user programs the
ref monitor override bit based on the status of the external
monitor. On the other hand, when ref monitor bypass = 0, the
ref monitor override control bit allows the user to manually test
the operation of both the valid latch and the validation timer. In
this case, the user relies on the signal generated by the internal
reference monitor (ref fault) but uses the ref monitor override
bit to emulate a faulted reference. That is, when ref monitor
override = 1, then faulted = 1, but when ref monitor override = 0,
then faulted = ref fault.
In addition, the user has the ability to emulate a timeout of the
validation timer via the appropriate force validation timeout
control bit in Register 0A0E. Writing a Logic 1 to any of these
Any time faulted = 1, then valid = 0, regardless of the state
of any other control signal. Therefore, faulted = 1 indicates
an invalid reference.
Any time the faulted signal transitions from 0 to 1 (that is,
from nonfaulted to faulted), the validation timer is
momentarily reset, which means that, once it is enabled, it
must exhaust its full counting sequence before it expires.
When faulted = 0 (that is, the reference is not faulted), the
validation timer is allowed to perform its timing sequence.
When faulted = 1 (that is, the reference is faulted), the
validation timer is reset and halted.
The faulted signal passes through an inverter, converting it
to a nonfaulted signal, which appears at the input of the
valid latch. This allows the valid latch to capture the state
of the nonfaulted signal when the validation timer expires.
REGISTER CONTROL BITS
REFERENCE
FORCE VALIDATION
MONITOR
REF MONITOR
REF MONITOR
OVERRIDE
TIMEOUT
BYPASS
REF FAULT
(8 COPIES, 1 PER REFERENCE INPUT)
REFERENCE VALIDATION LOGIC
1
0
Figure 34. Reference Validation Override
FAULTED
Rev. A | Page 28 of 112
R
VALIDATION TIMER
autoclearing bits triggers the valid latch, which is identically
equivalent to a timeout of the validation timer.
REFERENCE PROFILES
The AD9548 has eight independent profile registers. A profile
register contains 50 bytes that establish a particular set of device
parameters. Each of the eight input references can be assigned
to any one of the eight profiles (that is, more than one reference
can be assigned to the same profile). The profiles allow the user
to prescribe the specific device functionality that should take
effect when one of the input references (assigned to the profile)
becomes the active reference. Each profile register has the same
format and stores the following device parameters:
Reference-to-Profile Assignment Control
The user can manually assign a reference to a profile or let the
device make the assignment automatically. The manual reference
profile selection register (Address 0503 to Address 0506) is where
the user programs whether a reference-to-profile assignment is
manual or automatic. The manual reference profile selection
register is a 4-byte register partitioned into eight half bytes (or
nibbles). The eight nibbles form a one-to-one correspondence
with the eight reference inputs: one nibble for REF A, the next
for REF AA, and so on. For a reference configured as a differential
input, however, the device ignores the nibble associated with the
two-letter input. For example, if the B reference is differential, then
only the REFB nibble matters (the device ignores the REFBB nibble).
EN
TIMEOUT
Reference priority
Reference period value (in femtoseconds)
Inner tolerance value (1/tolerance)
Outer tolerance value (1/tolerance)
Validation timer value (milliseconds)
Redetect timer value (milliseconds)
Digital loop filter coefficients
Reference prescaler setting (R-divider)
Feedback divider settings (S, U, and V)
DPLL phase lock detector threshold level
DPLL phase lock detector fill rate
DPLL phase lock detector drain rate
DPLL frequency lock detector threshold level
DPLL frequency lock detector fill rate
DPLL frequency lock detector drain rate
D Q
R
VALID