AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 49

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AD9548/PCBZ

Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9548/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The condition is a 5-bit value with 32 possibilities. Condition = 0
is the null condition. When the null condition is in effect, the
EEPROM controller executes all instructions unconditionally.
The remaining 31 possibilities, condition = 1 through condition
= 31, modify the EEPROM controller’s handling of a download
sequence. The condition originates from one of two sources
(see Figure 50), as follows:
If Register 0E01, Bits[4:0] ≠ 0, then the condition is the value
stored in Register 0E01, Bits[4:0]; otherwise, the condition is
FncInit, Bits[7:3]. Note that a nonzero condition present in
Register 0E01, Bits[4:0] takes precedence over FncInit, Bits[7:3].
The condition tag board is a table maintained by the EEPROM
controller. When the controller encounters a condition instruct-
tion, it decodes the B1 through CF instructions as condition = 1
through condition = 31, respectively, and tags that particular
condition in the condition tag board. However, the B0
condition instruction decodes as the null condition, for which
the controller clears the condition tag board, and subsequent
download instructions execute unconditionally (until the
controller encounters a new condition instruction).
FncInit, Bits[7:3], which is the state of the M3 to M7
multifunction pins at power-up (see the Initial Pin
Programming section)
Register 0E01, Bits[4:0]
SCRATCH
EEPROM
PAD
THEY ARE READ FROM
THE SCRATCH PAD.
STORE CONDITION
INSTRUCTIONS AS
THEN TAG DECODED CONDITION
IF B1 ≤ INSTRUCTION ≤ CF,
PROCEDURE
UPLOAD
CONDITION 3 AND
OCCURRENCE OF
EEPROM CONTROLLER
INSTRUCTIONS
CONDITION 13
ARE TAGGED
DOWNLOAD.
WATCH FOR
CONDITION
EXAMPLE
DURING
Figure 50. EEPROM Conditional Processing
PROCEDURE
DOWNLOAD
CONDITION
HANDLER
Rev. A | Page 49 of 112
16
24
8
17
25
1
9
THEN CLEAR ALL TAGS
IF INSTRUCTION = B0,
10
18
26
2
TAG BOARD
CONDITION
INSTRUCTION(S)
11
19
27
EXECUTE/SKIP
3
During download, the EEPROM controller executes or skips
instructions depending on the value of condition and the
contents of the condition tag board. Note, however, that
condition instructions and the end instruction always execute
unconditionally during download. If condition = 0, then all
instructions during download execute unconditionally. If
condition ≠ 0 and there are any tagged conditions in the
condition tag board, then the controller executes instructions
only if the condition is tagged. If the condition is not tagged,
then the controller skips instructions until it encounters a
condition instruction that decodes as a tagged condition. Note
that the condition tag board allows for multiple conditions to be
tagged at any given moment. This conditional processing
mechanism enables the user to have one download instruction
sequence with many possible outcomes depending on the value
of the condition and the order in which the controller
encounters condition instructions.
12
20
28
4
13
21
29
5
14
22
30
6
15
23
31
7
IF {NO TAGS} OR {CONDITION = 0}
ELSE
ENDIF
EXECUTE INSTRUCTIONS
IF {CONDITION IS TAGGED}
ELSE
ENDIF
EXECUTE INSTRUCTIONS
SKIP INSTRUCTIONS
0E01, BITS[4:0]
IF {0E01, BITS[4:0] ≠ 0}
ELSE
ENDIF
REGISTER
CONDITION = 0E01, BITS[4:0]
CONDITION = FncInit, BITS[7:3]
5
5
M7
COND ITION
FncInit, BITS[7:3]
5
M3
AD9548

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