AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 8

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9548
REFERENCE SWITCHOVER SPECIFICATIONS
Table 10.
Parameter
REFERENCE SWITCHOVER SPECIFICATIONS
1
DISTRIBUTION CLOCK OUTPUTS (OUT0 TO OUT3)
Table 11.
Parameter
LVPECL MODE
LVDS MODE
CMOS MODE
f
REF
Maximum Output Phase Perturbation (Phase
Maximum Time/Time Slope (Hitless
Time Required to Switch to a New Reference
Maximum Output Frequency
Rise/Fall Time (20% to 80%)
Duty Cycle
Differential Output Voltage Swing
Common-Mode Output Voltage
Maximum Output Frequency
Rise/Fall Time
Duty Cycle
Differential Output Voltage Swing
Offset Voltage
Short-Circuit Output Current
Maximum Output Frequency
is the frequency of the active reference; R is the frequency division factor determined by the R-divider.
Build-Out Switchover)
Switchover)
Hitless Switchover
Phase Build-Out Switchover
Balanced, V
Unbalanced, ΔV
Common-Mode, V
Common-Mode Difference, ΔV
3.3 V Supply
1.8 V Supply
Strong Drive Strength Setting
Weak Drive Strength Setting
1
OD
(20% to 80%)
OD
OS
OS
Min
45
630
AVDD3
− 1.5
40
247
1.125
Min
315
Typ
725
180
770
AVDD3 − 1.3
725
200
13
250
25
150
Rev. A | Page 8 of 112
Typ
40
5
3
Max
315
55
910
AVDD3 −
1.05
350
60
454
50
1.375
50
24
Max
200
65,535
Unit
ps
ns/sec
sec
sec
Unit
MHz
ps
%
mV
V
MHz
ps
%
mV
mV
V
mV
mA
MHz
MHz
MHz
Test Conditions/Comments
Assumes a jitter-free reference; satisfies
Telcordia GR-1244-CORE requirements
Minimum/maximum values are
programmable upper bounds; a minimum
value ensures <10% error; satisfies
Telcordia GR-1244-CORE requirements
Calculated using the nominal phase
detector period (NPDP = R/f
Calculated using the nominal phase
detector period (NPDP = R/f
Test Conditions/Comments
Using internal current setting resistor
100 Ω termination across output pins
Magnitude of voltage across pins; output
driver static
Output driver static
Using internal current setting resistor
(nominal 3.12 kΩ)
100 Ω termination across the output pair
Voltage swing between output pins;
output driver static
Absolute difference between voltage
swing of normal pin and inverted pin;
output driver static
Output driver static
Voltage difference between pins; output
driver static
Output driver static
Weak drive option not supported for
operating the CMOS drivers using a 1.8 V
supply
10 pF load
REF
REF
)
)
1
1