AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 67

• Manufacturer Part Number: AD9548/PCBZ
• Description: Clock Generator Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9548/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9548
• Kit Contents: Board
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9548
• Primary Attributes: 62.5 ~ 450 MHz Output Frequency
• Secondary Attributes: SPI and I2C Compatible Control Port
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Addr
0A03
0A04
0A05
0A06
0A07
0A08
0A09
0A0A
0A0B
0A0C
0A0D
0A0E
0A0F
0A10
0D00
0D01
0D02
0D03
0D04
0D05
0D06
0D07
0D08
0D09
Opt
A, C
A, C
A, C
A, C
A, C
A, C
A, C
A, C
A, C
A, C
A, C
A, C
C
C
R
R
R
R
R
R
R
R
R
R
IRQ clearing
Incremental
Name
ResetFunc
phase offset
Reference
profile detect
Force
validation
timeout
Reference
monitor
override
Reference
monitor
bypass
EEPROM
System clock
IRQ monitor
D7
Unused
Unused
Unused
Switching
Unused
Ref AA
new profile
Ref BB
new profile
Ref CC
new profile
Ref DD
new profile
Unused
Detect DD
Force
Timeout
DD
Ref Mon
Override
DD
Ref Mon
Bypass DD
Unused
Unused
Unused
Unused
Switching
Unused
Ref AA
new profile
Ref BB
new profile
Ref CC
new profile
Ref DD
new profile
D6
Clear LF
Closed
Ref AA
validated
Ref BB
validated
Ref CC
validated
Ref DD
validated
Detect D
Force
Timeout
D
Ref Mon
Override
D
Ref Mon
Bypass D
Closed
Ref AA
validated
Ref BB
validated
Ref CC
validated
Ref DD
validated
Status (read only; accessible during EEPROM transactions)
D5
Clear CCI
SYSCLK
unlocked
Freerun
Ref AA
fault
cleared
Ref BB
fault
cleared
Ref CC
fault
cleared
Ref DD
fault
cleared
Detect CC
Force
Timeout
CC
Ref Mon
Override
CC
Ref Mon
Bypass CC
SYSCLK
unlocked
Freerun
Ref AA
fault
cleared
Ref BB
fault
cleared
Ref CC
fault
cleared
Ref DD
fault
cleared
Rev. A | Page 67 of 112
D4
Clear
phase ac-
cumulator
SYSCLK
locked
Holdover
History
updated
Ref AA
fault
Ref BB
fault
Ref CC
fault
Ref DD
fault
Detect C
Force
Timeout C
Ref Mon
Override C
Ref Mon
Bypass C
Stable
SYSCLK
locked
Holdover
History
updated
Ref AA
fault
Ref BB
fault
Ref CC
fault
Ref DD
fault
D3
Reset auto
sync
Unused
Distribu-
tion sync
Freq
unlocked
Freq un-
clamped
Ref A
new
profile
Ref B
new
profile
Ref C
new
profile
Ref D
new
profile
Detect BB
Force
Timeout
BB
Ref Mon
Override
BB
Ref Mon
Bypass BB
Unused
Unused
Distribu-
tion sync
Freq
unlocked
Freq un-
clamped
Ref A
new
profile
Ref B
new
profile
Ref C new
profile
Ref D new
profile
D2
Reset
TW history
Unused
Watchdog
timer
Freq
locked
Freq
clamped
Ref A
validated
Ref B
validated
Ref C
validated
Ref D
validated
Reset
phase
offset
Detect B
Force
Timeout B
Ref Mon
Override B
Ref Mon
Bypass B
Fault
detected
Unused
Unused
Watchdog
timer
Freq
locked
Freq
clamped
Ref A
validated
Ref B
validated
Ref C
validated
Ref D
validated
D1
Reset
all IRQs
SYSCLK Cal
complete
EEPROM
fault
Phase
unlocked
Phase slew
unlimited
Ref A
fault
cleared
Ref B
fault
cleared
Ref C
fault
cleared
Ref D
fault
cleared
Decrement
phase
offset
Detect AA
Force
Timeout
AA
Ref Mon
Override
AA
Ref Mon
Bypass AA
Load in
progress
Cal
in progress
SYSCLK Cal
complete
EEPROM
fault
Phase
unlocked
Phase slew
unlimited
Ref A
fault
cleared
Ref B
fault
cleared
Ref C
fault
cleared
Ref D
fault
cleared
D0
Reset
watchdog
SYSCLK Cal
started
EEPROM
complete
Phase
locked
Phase slew
limited
Ref A
fault
Ref B
fault
Ref C
fault
Ref D
fault
Increment
phase
offset
Detect A
Force
Timeout A
Ref Mon
Override A
Ref Mon
Bypass A
Save in
progress
Lock
detected
SYSCLK Cal
started
EEPROM
complete
Phase
locked
Phase slew
limited
Ref A
fault
Ref B
fault
Ref C
fault
Ref D
fault
AD9548
Def
00
00
00
00
00
00
00
00
00
00
00
00
00
00