LFE3-95E-PCIE-DKN Lattice, LFE3-95E-PCIE-DKN Datasheet - Page 103
LFE3-95E-PCIE-DKN
Manufacturer Part Number
LFE3-95E-PCIE-DKN
Description
MCU, MPU & DSP Development Tools LatticeECP3 PCI Express Dev Kit
Manufacturer
Lattice
Datasheet
1.LFE3-150EA-7FN672CTW.pdf
(130 pages)
Specifications of LFE3-95E-PCIE-DKN
Processor To Be Evaluated
LFE3-95EA-x
Processor Series
LatticeECP3
Interface Type
SPI
Operating Supply Voltage
1.2 V to 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 3-20. Power-On-Reset (POR) Timing
Figure 3-21. sysCONFIG Port Timing
V
V
1. Time taken from V
2. Device is in a Master Mode (SPI, SPIm).
3. The CFG pins are normally static (hard wired).
CC
CCIO8
CFG[2:0]
/ V
DONE
CCLK
CCAUX
1
INITN
2
3
/
CC
, V
CCAUX
or V
CCIO8
, whichever is the last to cross the POR trip point.
t
ICFG
t
VMC
3-51
Valid
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
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