PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 224

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GB004 FAMILY
REGISTER 18-16: U1IR: USB INTERRUPT STATUS REGISTER (DEVICE MODE ONLY)
DS39940D-page 224
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/K-0, HS
Note:
STALLIF
U-0
—
Individual bits can only be cleared by writing a ‘1’ to the bit position as part of a word write operation on the
entire register. Using Boolean instructions or bitwise operations to write to a single bit position will cause
all set bits at the moment of the write to become cleared.
Unimplemented: Read as ‘0’
STALLIF: STALL Handshake Interrupt bit
1 = A STALL handshake was sent by the peripheral during the handshake phase of the transaction in
0 = A STALL handshake has not been sent
Unimplemented: Read as ‘0’
RESUMEIF: Resume Interrupt bit
1 = A K-state was observed on the D+ or D- pin for 2.5 s (differential ‘1’ for low speed, differential ‘0’
0 = No K-state was observed
IDLEIF: Idle Detect Interrupt bit
1 = Idle condition was detected (constant Idle state of 3 ms or more)
0 = No Idle condition was detected
TRNIF: Token Processing Complete Interrupt bit
1 = Processing of current token was complete; read U1STAT register for endpoint information
0 = Processing of current token was not complete; clear U1STAT register or load next token from STAT
SOFIF: Start-of-Frame Token Interrupt bit
1 = A Start-of-Frame token received by the peripheral or the Start-of-Frame threshold was reached by
0 = No Start-of-Frame token was received or threshold reached
UERRIF: USB Error Condition Interrupt bit (read-only)
1 = An unmasked error condition has occurred; only error states enabled in the U1EIE register can set
0 = No unmasked error condition has occurred
URSTIF: USB Reset Interrupt bit
1 = Valid USB Reset has occurred for at least 2.5 s; Reset state must be cleared before this bit can
0 = No USB Reset has occurred. Individual bits can only be cleared by writing a ‘1’ to the bit position
Device mode
for full speed)
(clearing this bit causes the STAT FIFO to advance)
the host
this bit
be reasserted
as part of a word write operation on the entire register. Using Boolean instructions or bitwise oper-
ations to write to a single bit position will cause all set bits at the moment of the write to become
cleared.
U-0
U-0
—
—
K = Write ‘1’ to clear bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
RESUMEIF
R/K-0, HS
U-0
—
R/K-0, HS
IDLEIF
U-0
—
HS = Hardware Settable bit
‘0’ = Bit is cleared
R/K-0, HS
TRNIF
U-0
—
R/K-0, HS
SOFIF
U-0
—
 2010 Microchip Technology Inc.
x = Bit is unknown
UERRIF
U-0
R-0
—
R/K-0, HS
URSTIF
U-0
—
bit 8
bit 0