PIC24FJ64GB002-I/SS Microchip Technology, PIC24FJ64GB002-I/SS Datasheet - Page 3

• Manufacturer Part Number: PIC24FJ64GB002-I/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP, USB OTG 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology

Specifications of PIC24FJ64GB002-I/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current (max): 300 mA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Features:
• USB v2.0 On-The-Go (OTG) Compliant
• Dual Role Capable – can act as either Host or Peripheral
• Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB
• Full-Speed USB Operation in Device mode
• High-Precision PLL for USB
• 0.25% Accuracy using Internal Oscillator – No External
• Internal Voltage Boost Assist for USB Bus Voltage
• Interface for Off-Chip Charge Pump for USB Bus
• Supports up to 32 Endpoints (16 bidirectional):
• On-Chip USB Transceiver
• Interface for Off-Chip USB Transceiver
• Supports Control, Interrupt, Isochronous and Bulk Transfers
• On-Chip Pull-up and Pull-Down Resistors
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 0.25% Typical Accuracy:
• 17-Bit x 17-Bit Single-Cycle Hardware
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture:
• Linear Program Memory Addressing up to 12 Mbytes
• Linear Data Memory Addressing up to 64 Kbytes
• Two Address Generation Units for Separate Read and
 2010 Microchip Technology Inc.
32GB002
64GB002
32GB004
64GB004
PIC24FJ
Device
Operation in Host mode
Crystal Required
Generation
Voltage Generation
- USB module can use any RAM location on the
- 96 MHz PLL
- Multiple divide options
Fractional/integer Multiplier
- 76 base instructions
- Flexible addressing modes
Write Addressing of Data Memory
USB On-The-Go (OTG) and nanoWatt XLP Technology
device as USB endpoint buffers
28
28
44
44
28/44-Pin, 16-Bit, Flash Microcontrollers with
32K
64K
32K
64K
8K
8K
8K
8K
15
15
25
25
Remappable Peripherals
5
5
5
5
PIC24FJ64GB004 FAMILY
5
5
5
5
5
5
5
5
2
2
2
2
Power Management Modes:
• Selectable Power Management modes with nanoWatt
Special Microcontroller Features:
• Operating Voltage Range of 2.0V to 3.6V
• Self-Reprogrammable under Software Control
• 5.5V Tolerant Input (digital pins only)
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
• Flash Program Memory:
• Fail-Safe Clock Monitor Operation:
• On-Chip 2.5V Regulator
• Power-on Reset (POR), Power-up Timer (PWRT)
• Two Flexible Watchdog Timers (WDT) for Reliable
• In-Circuit Serial Programming™ (ICSP™) and
• JTAG Boundary Scan Support
XLP Technology for Extremely Low Power:
- Deep Sleep mode allows near total power-down
- Extreme low-power DSBOR for Deep Sleep,
- Sleep mode shuts down peripherals and core for
- Idle mode shuts down the CPU and peripherals for
- Doze mode enables CPU clock to run slower than
- Alternate Clock modes allow on-the-fly switching to
- 10,000 erase/write cycle endurance (minimum)
- 20-year data retention minimum
- Selectable write protection boundary
- Detects clock failure and switches to on-chip
and Oscillator Start-up Timer (OST)
Operation:
- Standard programmable WDT for normal operation
- Extreme low-power WDT with programmable
In-Circuit Debug (ICD) via 2 Pins
(20 nA typical and 500 nA with RTCC or WDT),
along with the ability to wake-up on external triggers
or self-wake on programmable WDT or RTCC alarm
LPBOR for all other modes
substantial power reduction, fast wake-up
significant power reduction, down to 4.5 A typical
peripherals
a lower clock speed for selective power reduction
during Run mode down to 15 A typical
FRC oscillator
period of 2 ms to 26 days for Deep Sleep mode
2
2
2
2
2
2
2
2
13
13
9
9
3
3
3
3
Y
Y
Y
Y
Y
Y
Y
Y
DS39940D-page 3
Y
Y
Y
Y
Y
Y
Y
Y