ISP1582BS,557 NXP Semiconductors, ISP1582BS,557 Datasheet - Page 23

• Manufacturer Part Number: ISP1582BS,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1582BS,557

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Table 15.
ISP1582_8
Product data sheet
Name
General registers
Interrupt
Chip ID
Frame Number
Scratch
Unlock Device
Test Mode
Register overview
8.2.1 Address register (address: 00h)
8.1 Register access
8.2 Initialization registers
The ISP1582 uses a 16-bit bus access. For single-byte registers, the upper byte (MSByte)
must be ignored.
Endpoint specific registers are indexed using the Endpoint Index register. The target
endpoint must be selected before accessing the following registers:
Remark: Write zero to all reserved bits, unless otherwise specified.
This register sets the USB assigned address and enables the USB device.
shows the Address register bit allocation.
Bits DEVADDR[6:0] will be cleared whenever a bus reset, a power-on reset or a soft reset
occurs. Bit DEVEN will be cleared whenever a power-on reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, firmware must write the
(enabled) device address to the Address register, followed by sending an empty packet to
the host. The new device address is activated when the device receives an
acknowledgment from the host for the empty packet token.
•
•
•
•
•
•
Destination
device
device
device
device
device
PHY
Buffer length
Buffer status
Control function
Data port
Endpoint MaxPacketSize
Endpoint type
…continued
Address Description
18h
70h
74h
78h
7Ch
84h
Rev. 08 — 22 January 2009
shows interrupt sources
product ID code and hardware version
last successfully received
Start-Of-Frame: lower byte (byte 0) is
accessed first
allows save or restore of firmware status
during suspend
re-enables register write access after
suspend
direct setting of the DP and DM states,
internal transceiver test (PHY)
Hi-Speed USB peripheral controller
© ST-NXP Wireless 2009. All rights reserved.
Size
(bytes)
4
3
2
2
2
1
ISP1582
Table 16
Reference
Section 8.5.1
on page 44
Section 8.5.2
on page 46
Section 8.5.3
on page 46
Section 8.5.4
on page 47
Section 8.5.5
on page 47
Section 8.5.6
on page 48
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